Motorola MVME3600 Series Programmer's Reference Manual page 10

MPIC Registers ................................................................................................ 2-68
RavenMPIC Registers ............................................................................... 2-68
Feature Reporting Register ....................................................................... 2-72
Global Configuration Register .................................................................. 2-73
Vendor Identification Register .................................................................. 2-74
Processor Init Register .............................................................................. 2-74
IPI Vector/Priority Registers..................................................................... 2-75
Spurious Vector Register .......................................................................... 2-76
Timer Frequency Register......................................................................... 2-76
Timer Current Count Registers ................................................................. 2-77
Timer Basecount Registers ....................................................................... 2-77
Timer Vector/Priority Registers ................................................................ 2-78
Timer Destination Registers...................................................................... 2-79
External Source Vector/Priority Registers ................................................ 2-79
External Source Destination Registers...................................................... 2-81
Raven-Detected Errors Vector/Priority Register ...................................... 2-81
Raven-Detected Errors Destination Register ............................................ 2-82
Interprocessor Interrupt Dispatch Registers.............................................. 2-83
Interrupt Task Priority Registers ............................................................... 2-83
Interrupt Acknowledge Registers.............................................................. 2-84
End-of-Interrupt Registers ........................................................................ 2-85
Programming Notes.......................................................................................... 2-85
External Interrupt Service ......................................................................... 2-85
Reset State ................................................................................................. 2-86
Operation .......................................................................................................... 2-87
Interprocessor Interrupts ........................................................................... 2-87
Dynamically Changing I/O Interrupt Configuration................................. 2-87
EOI Register.............................................................................................. 2-88
Interrupt Acknowledge Register ............................................................... 2-88
8259 Mode ................................................................................................ 2-88
Current Task Priority Level ...................................................................... 2-88
Architectural Notes........................................................................................... 2-89
CHAPTER 3 Falcon ECC Memory Controller Chipset
Introduction ............................................................................................................... 3-1
Summary of Features.......................................................................................... 3-1
Block Diagrams .................................................................................................. 3-2
Functional Description .............................................................................................. 3-6
Performance........................................................................................................ 3-6
Four-beat Reads/Writes............................................................................... 3-6
Single-beat Reads/Writes ............................................................................ 3-7
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