Table 6. Mrc Progress Codes - Intel P4304XXMFEN2 Service Manual

Intel ® Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
Diagnostic LED Decoder
1 = LED On, 0 = LED Off
Upper Nibble
Checkpoi
M
nt
S
B
8 4
h h
# #
LED
7 6
MRC Progress Codes
B0h 1 0
B1h 1 0
B2h 1 0
B3h 1 0
B4h 1 0
B5h 1 0
B6h 1 0
B7h 1 0
B8h 1 0
B9h 1 0
BAh 1 0
BBh 1 0
BCh 1 0
BFh 1 0
Should a major memory initialization error occur, preventing the system from booting with data integrity, a
beep code is generated, the MRC displays a fatal error code on the diagnostic LEDs, and a system halt
command is executed. Fatal MRC error halts do NOT change the state of the System Status LED, and they do
NOT get logged as SEL events. The following table lists all MRC fatal errors that are displayed to the diagnostic
LEDs.
Note: Fatal MRC errors will display POST error codes that may be the same as BIOS POST progress codes
displayed later in the POST process. You can distinguish the fatal MRC codes from the BIOS POST progress
codes by the 3 long beeps accompanying the memory failure beep code of identified in Table 8.

Table 6. MRC Progress Codes

Lower Nibble
2 1 8 4 2
h h h h h
# # # # #
5 4 3 2 1
1 1 0 0 0
1 1 0 0 0
1 1 0 0 1
1 1 0 0 1
1 1 0 1 0
1 1 0 1 0
1 1 0 1 1
1 1 0 1 1
1 1 1 0 0
1 1 1 0 0
1 1 1 0 1
1 1 1 0 1
1 1 1 1 0
1 1 1 1 1
L
S
Description
B
1
h
#
0
0 Detect DIMM Population
1 Set DDR3 Frequency
0 Gather Remaining SPD Data
1 Program Registers on the Memory Controller Level
0 Evaluate RAS Modes and Save Rank Information
1 Program Registers on the Channel Level
0 Perform the JEDEC-defined Initialization Sequence
1 Train DDR3 Ranks
0 Initialize CLTT/OLTT
1 Hardware Memory Test and initialization
0 Execute software memory initialization
1 Program Memory Map and Interleaving
0 Program RAS Configuration
1 MRC is Done
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