Integra DTR-7.8 Service Manual page 61

A
SCHEMATIC DIAGRAM-18(SD-18)
WAVEFORM SECTION
1
NOTE:
1. WF01 is short for Waveform01 .
2. Refer to SD-9(SCHEMATIC DIAGRAM-9)
for the location of each waveform on circuit.
3. SD-x:XY is short for Shcematic Diagram-x and
each socket's location, X=A to H, Y=1 to 5.
OPT1 (SD-9:B2)
WF01
2
Duty varies according to audio data
WF04 (SD-9:B4)
SAI_LRCK
3
20.8us
WF07 (SD-9:D4)
CX_LRCK
4
20.8us
(SD-9:F3)
WF10 AUDIO_FL
Analog audio waveform with aliasing noise
5
B
Digital Audio Waveform Part
LR CLOCK (SAI_LRCK, CX_LRCK)
Fs=48kHz : DVD, Clock width=20.8us
Fs=44.1kHz : CD, Clock width=22.7us
BIT CLOCK (SAI_SLCK, CX_SLCK)
64Fs=3072kHz : DVD, Clock width=325ns
64Fs=2822.4kHz : CD, Clock width=354ns
(SD-9:C2)
WF02 COAX1
4.0V
Duty always varies according to audio data
WF05 SAI_SLCK (SD-9:C4)
3.3V
325 ns
WF08 (SD-9:D4)
CX_SCLK
3.3V
325 ns
WF10 AUDIO_FL (SD-9:F3)
2.8V
0V
Aliasing noise in no audio data
C
WF03 SAI_SDOUT
5.0V
Duty varies according to audio data
WF06 CX_SDIN1 (SD-9:D4)
3.3V
20.8us
WF09 (SD-9:E4)
DAC_OUT-
3.3V
Analog audio waveform with aliasing noise
220mVp-p
DTR-7.8
D
(SD-9:B4)
3.3V
3.3V
2.8V
0V