Denon S-301 Service Manual page 72

Hide thumbs Also See for S-301:
Table of Contents

Advertisement

LC72720NM (IC506: 1U-3694)
Vref
1
24
MPXIN
2
23
Vdda
3
22
Vssa
4
21
FLOUT
5
20
CIN
6
19
T1
7
18
T2
8
17
T3 (RDCL)
9
16
10
15
T4 (RDDA)
T5 (RSFT)
11
14
XOUT
12
13
NJM2596 (IC509: 1U-3695)
24
1
QT240 (IC306: 1U-3681)
SNS2
20
1
SNS2K
19
2
SNS1
3
18
SNS1K
4
17
QT240
OUT1
5
16
20-SSOP
OUT2
6
15
OUT3
7
14
VSS
8
13
SS/SYNC
12
9
n.c.
11
10
Vdda
SYR
REFERENCE
VOLTAGE
CE
Vssa
DI
CL
ANTIALIASING
MPXIN
DO
RDS-ID
SYNC
DO
T7 (CORREC/ARI-ID/BEO)
CL
T6 (ERROR/57K/BE1)
DI
CE
Vssd
Vddd
T1
XIN
T2
T3 T7
13
12
Pin
1
SNS3K
2
3
SNS3
4
SNS4K
5
6
SNS4
7
n.c.
8
9
OSC
10
VDD
11
12
/RES
13
OUT4
14
15
n.c.
16
17
18
19
20
FLOUT CIN
VREF
VREF
57kHz
BPF
(SCF)
SMOOTHING
FILTER
FILTER
RAM
CCB
(24 BLOCK DATA)
MEMORY CONTROL
TEST
Name
Description
SNS2
Sense pin (to Rs2 + Cs2)
SNS2K
Sense pin (to Cs2, electrode)
SNS1
Sense pin (to Rs1 + Cs1)
SNS1K
Sense pin (to Cs1, electrode); speed option
OUT1
Output, key 1
OUT2
Output, key 2
OUT3
Output, key 3
VSS
Ground
SYNC/SS
Sync in and/or spread spectrum drive
n.c.
Unbonded internally
n.c.
Unbonded internally
OUT4
Output, key 4
/RES
Reset pin, active low. Can usually tie to Vdd.
VDD
Power: +4.0 to +5V locally regulated
OSC
Oscillator bias in
VSS
Ground or no connect
SNS4
Sense pin (to Rs4 + Cs4)
SNS4K
Sense pin (to Cs4, electrode); OPT2
SNS3
Sense pin (to Rs3 + Cs3)
SNS3K
Sense pin (to Cs3, electrode); OPT1
72
CLOCK
PLL
RECOVERY
(57kHz)
(1167.5Hz)
DATA
DECODER
ERROR CORRECTION
SYNC/EC CONTROLLER
(SOFT DECISION)
CLK(4.332MHz)
SYNC
DETECT-1
DETECT-2
OSC/DIVIDER
XIN
XOUT
S-301
Vddd
Vssd
RDS-ID
SYNC
SYR
SYNC

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents