Denon S-301 Service Manual page 20

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Name
Pin Numbers
ADVSS
112
YUV5
113
YDAC
YUV6
114
VDAC
YUV7
FDAC
115
CAMIN3
PCLK2XSCN
116
CAMIN4
PCLKQSCN
CAMIN5
117
AUX3[2]
VSYNC#
CAMIN6
118
AUX3[1]
HSYNC#
CAMIN7
119
AUX3[0]
HD[5:0]
DCI[5:0]
122:127
AUX1[5:0]
HD6
DCI6
128
AUX1[6]
VFD_DOUT
HD7
DCI7
131
AUX1[7]
VFD_DIN
HD8
DCI_FDS#
132
AUX2[0]
VFD_CLK
(
)
I/O
Definition
G
Analog ground for video DAC.
O
YUV pixel 5 output data.
O
Video DAC output. Refer to description and matrix for UDAC pin 106.
O
YUV pixel 6 output data.
O
Video DAC output. Refer to description and matrix for UDAC pin 106.
O
YUV pixel 7 output data.
O
Video DAC output. Refer to description and matrix for UDAC pin 106.
I
Camera YUV 3.
I/O
27-MHz video output pixel clock.
I
Camera YUV 4.
O
13.5-MHz video output pixel clock.
I
Camera YUV 5.
I/O
Aux3 data I/O.
I/O
Vertical sync (active-low).
I
Camera YUV 6.
I/O
Aux3 data I/O.
I/O
Horizontal sync (active-low).
I
Camera YUV 7.
I/O
Aux3 data I/O.
I/O
Host data bus lines 5:0.
I/O
DVD channel data I/O.
I/O
Aux1 data I/O.
I/O
Host data bus line 6.
I/O
DVD channel data I/O.
I/O
Aux1 data I/O.
I
VFD data output.
I/O
Host data bus line 7.
I/O
DVD channel data I/O.
I/O
Aux1 data I/O.
I
VFD data input.
I/O
Host data bus line 8.
I/O
DVD input sector start (active-low).
I/O
Aux2 data I/O.
I
VFD clock input.
20
S-301

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