Sanyo PLV-Z4 Service Manual page 90

IC Block Diagrams
● L3E07110 <Digital Gamma,
10bit
RIN[9:0]
10bit
GIN[9:0]
10bit
BIN[9:0]
OSDRIN[1:0]
OSDGIN[1:0]
OSD
OSDBIN[1:0]
PATTERN
GENERATOR
OSDSW
SCS
SCLK
SDATA
HSYNC
VSYNC
DCLK
PLL
SELECT
● PW386 <Scan Converter & Main CPU, IC301>
PORTA(7:0)
PORTB(7:0)
PORTC(7:0)
PORTD(7:0)
GPIO PWM
Microprocessor Bus
IN1CLK
IN1PEN
IN1VS
Input Port 1
IN1HS
IN1SOG
IN1VBI
Sync Decoder
IN1CST
Auto Image Optimizer
IN1FLD
IN1CLP
IN1RGB(29:0)
VBI
Memory
Interface
IN0CLK
IN0PEN
IN0VS
Input Port 0
IN0HS
IN0SOG
IN0VBI
Sync Decoder
IN0CST
Auto Image Optimizer
IN0FLD
IN0CLP
IN0RGB(59:0)
VBI
Memory
Interface
MCKFBK,MCKFBKN,MCK,MCKN,MCKE,
MDM,MRAS,MCAS,MWE
>
IC401
IRRCVR(1:0) NMI
EXTINT(1:0)
2-Wire IR Interrupt
Serial Decoders Controller
Video
Enhancement
Scaler
Deinterlacer
Internal DRAM
Frame Buffer Memory
Controller DDR SDRAM
MA(12:0), MD(31:0),
MDQS(3:0)
-90-
R1 10bit
R2 10bit
10bit
G1
G2 10bit
10bit
B1
10bit
B2
HSO VSO HSI VSI
A(23:1),D(15:0)
BHEN,RD,WR
ROMWE,
CS(1:0) ROMOE
ROM 16-bit Turbo Watchdog
Interface Microprocessor & Timer
OSD
Control and Generation
Image Management
Video Enhancement
Color Space Converter
Image Blending
MCLK UCLK
Spread
Spectrum
PLL
XI XO
R1OUT[9:0]
R2OUT[9:0]
G1OUT[9:0]
G2OUT[9:0]
B1OUT[9:0]
B2OUT[9:0]
HPLL
HRESETO
VRESETO
DXOUT(R:G:B)
CLXOUT(R:G:B)
ENBX1-5(R:G:B)
DYOUT(R:G:B)
CLYOUT(R:G:B)
ENBY1-2(R:G:B)
FRP(R:G:B)
SHCLK(R:G:B)
SHCLK(R:G:B)N
XFR(R:G:B)
STQO(R:G:B)
STSQE(R:G:B)
NRG
CLP1~2
SHENB
DIRX(R:G:B)
DIRX(R:G:B)N
DIRY
TMS
RxD/ TCK
TxD TDO
TCI
UART JTAG
DHS
Display Timing DVS
Generator DEN
DCLK
Display Port
Color Matrix, Gamma DRGB(29:0)
CLTs,Color Space
Expander
PW386/PW386C
Internal Block Diagram