Nvidia NFORCE2 ULTRA 400 400 User Manual page 77

Nvidia corp. computer hardware user manual
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43h
44h
45-46h
47h
48h
49h
4A-4Dh
4Eh
4Fh
50h
51h
52h
53-54h
55h
56h
57h
58h
59h
5Ah
5Bh
5Ch
5Dh
5E-5Fh
60h
61-64h
65h
66h
67h
68h
69h
6Ah
6Bh
6Ch
6Dh
Test 8259 functionality.
Reserved
Reserved
Initialize EISA slot
Reserved
1.
Calculate total memory by testing the last double word of each 64K
page.
2.
Program writes allocation for AMD K5 CPU.
Reserved
1.
Program MTRR of M1 CPU
2.
Initialize L2 cache for P6 class CPU & program CPU with proper
cacheable range.
3.
Initialize the APIC for P6 class CPU.
4.
On MP platform, adjust the cacheable range to smaller one in case
the cacheable ranges between each CPU are not identical.
Reserved
Initialize USB
Reserved
Test all memory (clear all extended memory to 0)
Reserved
Display number of processors (multi-processor platform)
Reserved
1.
Display PnP logo
2.
Early ISA PnP initialization
-Assign CSN to every ISA PnP device.
Reserved
Initialize the combined Trend Anti-Virus code.
Reserved
(Optional Feature)
Show message for entering AWDFLASH.EXE
from FDD (optional)
Reserved
1.
Initialize Init_Onboard_Super_IO switch.
2.
Initialize Init_Onbaord_AUDIO switch.
Reserved
Okay to enter Setup utility; i.e. not until this POST stage can users enter
the CMOS setup utility.
Reserved
Initialize PS/2 Mouse
Reserved
Prepare memory size information for function call: INT 15h ax=E820h
Reserved
Turn on L2 cache
Reserved
Program chipset registers according to items described in Setup & Auto-
configuration table.
Reserved
1.
Assign resources to all ISA PnP devices.
2.
Auto assign ports to onboard COM ports if the corresponding item
in Setup is set to "AUTO".
Appendix
C-3

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