ADLINK Technology cPCI-7300A Manuals

Manuals and User Guides for ADLINK Technology cPCI-7300A. We have 3 ADLINK Technology cPCI-7300A manuals available for free PDF download: User Manual

ADLINK Technology cPCI-7300A User Manual

ADLINK Technology cPCI-7300A User Manual (112 pages)

80MB Ultra-High Speed 32-CH Digital I/O Boards

Brand: ADLINK Technology | Category: I/O Systems | Size: 0 MB

Table of Contents

Table of Contents
5
List of Tables

11
1 Introduction

13
- Applications
  14
- Features
  14
- Specifications
  15
- Software Support
  17
  - Programming Library
    17
  - DAQ-LVIEW Pnp: Labview® Driver
    18
  - PCIS-VEE: HP-VEE Driver
    18
  - Daqbenchtm: Activex Controls
    18
2 Installation

19
- What You Have
  19
- Unpacking
  20
- Device Installation for Windows Systems
  20
- PCI-7300A's Layout
  21
- Figure 2-1: PCI-7300A Layout Diagram
  21
- Figure 2-2: Cpci-7300A Layout Diagram
  22
- Hardware Installation Outline
  23
- Connector Pin Assignment
  24
- Table 2-1: Connector Pin Assignment
  24
- Figure 2-3: CN1 Pin Assignment
  26
- Wiring and Termination
  27
- Termination Board Supporting
  28
  - Connect with DIN-100S
    28
  - Connect with DIN-502S
    28
3 Registers

29
4 Operation Theory

43
5 C++ Libraries

69
- Libraries Installation
  69
- Programming Guide
  70
  - Naming Convention
    70
  - Data Types
    70
  - Table 5-1: Data Types
    70
- 7300_Initial
  71
  - Description
    71
  - Syntax
    71
  - Argument
    71
  - Return Code
    72
- 7300_Close
  73
  - Description
    73
  - Syntax
    73
  - Argument
    73
  - Return Code
    73
- 7300_Configure
  74
  - Description
    74
  - Syntax
    74
  - Argument
    74
  - Return Code
    75
- 7300_Di_Mode
  76
  - Description
    76
  - Syntax
    76
  - Argument
    76
  - Return Code
    76
- 7300_Do_Mode
  77
  - Description
    77
  - Syntax
    77
  - Argument
    77
  - Return Code
    78
- 7300_Aux_Di
  79
  - Description
    79
  - Syntax
    79
  - Argument
    79
  - Return Code
    79
- 7300_Aux_Di_Channel
  80
  - Description
    80
  - Syntax
    80
  - Argument
    80
  - Return Code
    80
- 7300_Aux_Do
  81
  - Description
    81
  - Syntax
    81
  - Argument
    81
  - Return Code
    81
- 7300_Aux_Do_Channel
  82
  - Description
    82
  - Syntax
    82
  - Argument
    82
  - Return Code
    82
- 7300_Alloc_Dma_Mem
  83
  - Description
    83
  - Syntax
    83
  - Argument
    83
  - Return Code
    83
- 7300_Free_Dma_Mem
  84
- Description
  84
- Syntax
  84
- Argument
  84
- Return Code
  84
- 7300_Di_Dma_Start
  85
  - Description
    85
  - Syntax
    86
  - Argument
    87
  - Return Code
    87
- 7300_Di_Dma_Status
  89
  - Description
    89
  - Syntax
    89
  - Argument
    89
- 7300_Di_Dma_Abort
  90
  - Description
    90
  - Syntax
    90
  - Argument
    90
  - Return Code
    90
- 7300_Getoverrunstatus
  91
  - Description
    91
  - Syntax
    91
  - Argument
    91
- 7300_Do_Dma_Start
  92
  - Description
    92
  - Syntax
    92
  - Argument
    92
  - Return Code
    93
- 7300_Do_Dma_Status
  94
  - Description
    94
  - Syntax
    94
  - Argument
    94
  - Return Code
    94
- 7300_Do_Dma_Abort
  95
  - Description
    95
  - Syntax
    95
  - Argument
    95
  - Return Code
    95
- 7300_Do_Pg_Start
  96
  - Description
    96
  - Syntax
    96
    
    Argument
    96
    
    Return Code
    96
  - 7300_Do_Pg_Stop
    98
    
    Description
    98
    
    Syntax
    98
    
    Argument
    98
    
    Return Code
    98
  - 7300_Di_Timer
    99
    
    Description
    99
    
    Syntax
    99
    
    Argument
    99
    
    Return Code
    99
  - 7300_Do_Timer
    100
    
    Description
    100
    
    Syntax
    100
    
    Argument
    100
    
    Return Code
    100
  - 7300_Int_Timer
    101
    
    Description
    101
    
    Syntax
    101
    
    Argument
    101
    
    Return Code
    101
  - 7300_Get_Sample
    102
    
    Description
    102
    
    Syntax
    102
    
    Argument
    102
    
    Return Code
    102
  - 7300_Set_Sample
    103
    
    Description
    103
    
    Syntax
    103
  - 7300_Getunderrunstatus
    104
    
    Description
    104
    
    Syntax
    104
    
    Argument
    104
    
    Return Code
    104
Appendix

105
- The Intel (NEC) 8254
  105
- The Control Byte
  105
- Mode Definition
  107

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ADLINK Technology cPCI-7300A User Manual

ADLINK Technology cPCI-7300A User Manual (114 pages)

80 MB Ultra-High Speed 32-CH Digital I/O Boards

Brand: ADLINK Technology | Category: I/O Systems | Size: 0 MB

Table of Contents

Table of Contents
5
List of Tables
8
Introduction
11
Applications
12
Features
12
Specifications
13
Software Support
16
Programming Library
16
DAQ-LVIEW Pnp: Labview® Driver
16
PCIS-VEE: HP-VEE Driver
17
Daqbenchtm: Activex Controls
17
Installation
19
What You Have
19
Unpacking
20
Device Installation for Windows Systems
20
Cpci/Pci/Pcie-7300A Layout
21
Figure 2-1: PCI-7300A Layout Diagram
21
Figure 2-2: Cpci-7300A Layout Diagram
22
Figure 2-3: Pcie-7300A Layout Diagram
22
Hardware Installation Outline
23
Connector Pin Assignment
24
Table 2-1: Connector Pin Assignment
24
Figure 2-4: CN1 Pin Assignment
26
Wiring and Termination
27
Termination Board Support
28
Connect with DIN-100S
28
Connect with DIN-502S
28
Registers
29
I/O Port Base Address
30
Table 3-1: I/O Port Base Address
30
DI_CSR: DI Control & Status Register
32
DO_CSR: DO Control & Status Register
34
Auxiliary Digital I/O Register
36
INT_CSR: Interrupt Control and Status Register
37
DI_FIFO: DI FIFO Direct Access Port
38
DO_FIFO: DO External Data FIFO Direct Access Port
39
FIFO_CR: FIFO Almost Empty/Full Register
40
POL_CNTRL: Control Signal Polarity Control Register
41
PLX PCI-9080 DMA Control Registers
42
Operation Theory
43
I/O Configuration
44
Table 4-1: I/O Configuration
44
Block Diagram
45
Figure 4-1: Block Diagram
45
Digital I/O Data Flow
46
Figure 4-2: Data Flow of Digital Input
46
Figure 4-3: Data Flow of Digital Output
46
Input FIFO and Output FIFO
47
Bus-Mastering DMA
48
Figure 4-4: Maximum Data Throughput
48
Scatter/Gather DMA
50
Figure 4-5: Scatter/Gather DMA for Digital Output
50
Clocking Mode
51
Figure 4-6: Timer Configuration
51
Starting Mode
53
Active Terminator
54
Digital Input Operation Mode
55
Digital Input DMA in Internal Clock Mode
55
Digital Input DMA in External Clock Mode
57
Figure 4-7: DIREQ as Input Data Strobe (Rising Edge Active)
58
Digital Input DMA in Handshaking Mode
59
Figure 4-8: DIREQ as Input Data Strobe (Falling Edge Active)
59
Continuous Digital Input
61
Figure 4-9: DIREQ & DIACK Handshaking
61
Digital Output Operation Mode
63
Digital Output DMA in Internal Clock Mode
63
Digital Output DMA in Handshaking Mode
64
Figure 4-10: DOREQ as Output Data Strobe
64
Digital Output DMA in Burst Handshaking Mode
66
Figure 4-11: DOREQ & DOACK Handshaking
66
Pattern Generator
69
Auxiliary DIO
70
C++ Libraries
71
Libraries Installation
72
Programming Guide
73
Table 5-1: Data Types
73
7300_Initial
74
7300_Close
76
7300_Configure
77
7300_Di_Mode
79
7300_Do_Mode
80
7300_Aux_Di
82
7300_Aux_Di_Channel
83
7300_Aux_Do
84
7300_Aux_Do_Channel
85
7300_Alloc_Dma_Mem
86
7300_Free_Dma_Mem
87
7300_Di_Dma_Start
88
7300_Di_Dma_Status
92
7300_Di_Dma_Abort
93
7300_Getoverrunstatus
94
7300_Do_Dma_Start
95
7300_Do_Dma_Status
97
7300_Do_Dma_Abort
98
7300_Do_Pg_Start
99
7300_Do_Pg_Stop
101
7300_Di_Timer
102
7300_Do_Timer
103
7300_Int_Timer
104
7300_Get_Sample
105
7300_Set_Sample
106
7300_Getunderrunstatus
107
Appendix
109
The Intel (NEC) 8254
109
The Control Byte
109
Mode Definition
111

ADLINK Technology cPCI-7300A User Manual

ADLINK Technology cPCI-7300A User Manual (85 pages)

80MB Ultra-High Speed 32-CH Digital I/O Boards

Brand: ADLINK Technology | Category: Computer Hardware | Size: 4 MB

Table of Contents

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