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2
SH7216
No.
82
PD21/D21/IRQ5/TEND1/AUDCK/EXOUT
83
PD22/D22/IRQ6/DREQ1/WOL
93
PD30/D30/TIOC3CS/SSL3/RX_ER
94
PD31/D31/TIOC3AS/SSL2/RX_DV
97
PA12/IRQ0/TIC5U/CS0/SSL1/TX_CLK
98
PA11/IRQ1/TIC5V/CS1/TX_EN/CRx0/RXD0
99
PA10/IRQ2/TIC5W/CS2/MII_TXD0/CTx0/TXD0
100
PA9/IRQ3/TCLKD/CS3/MII_TXD1/SSL0/SCK0
101
PA8/IRQ4/TCLKC/CS4/MII_TXD2/MISO/RXD1
102
PA7/IRQ5/TCLKB/CS5/MII_TXD3/MOSI/TXD1
103
PA6/IRQ6/TCLKA/CS6/TX_ER/RSPCK/SCK1
110
PB12/SCL/POE1/IRQ2
111
PB13/SDA/POE2/IRQ3
116
PB14/IRQ6
117
PB15/(PUPD)/IRQ7
121
EXTAL
123
NMI
133
RES
138
PF0/AN0
139
PF1/AN1
140
PF2/AN2
141
PF3/AN3
146
PF4/AN4
147
PF5/AN5
148
PF6/AN6
149
PF7/AN7
154
WDTOVF
157
PA0/RXD0/CS0/CRx0/IRQ4/RX_CLK
158
PA1/TXD0/CS1/CTx0/IRQ5/MII_RXD0
159
PA2/SCK0/SSL0/CS2/TCLKD/MII_RXD1
160
PA3/RXD1/MISO/CS3/TCLKC/MII_RXD2
161
PA4/TXD1/MOSI/CS4/TCLKB/MII_RXD3
162
PA5/SCK1/RSPCK/CS5/TCLKA/RX_ER
165
PE7/TIOC2B/UBCTRG/RXD2/SSL1/RX_DV
166
PE8/TIOC3A/DREQ2/SCK2/SSL2/EXOUT
167
PE10/TIOC3C/DREQ3/TXD2/SSL3/TX_CLK
168
PE9/TIOC3B/DACK2/TX_EN
169
PE11/TIOC3D/DACK3/MII_TXD0
170
PE12/TIOC4A/MII_TXD1
171
PE13/TIOC4B/MRES/MII_TXD2
172
PE14/DACK0/TIOC4C/MI_TXD3
173
PE15/DACK1/TIOC4D/IRQOUT/TX_ER
176
PE0/TIOC0A/TIOC4AS/DREQ0/LINKSTA
Brackets [] indicate the signals connected to the CPU pin via device, element, and jumper.
.
Rev. 0.02 Mar. 27, 2009
REJ11J0038-0002
Table 2.5.2 I/O Port Functions (2/2)
Pin name
Expansion Connectors
JA1
JA2
JA3
JA5
[22]
21
[15]
[14]
[13]
[8]
[6]
[12]
[11]
[10]
[20]
[9]
25
26
17
16
2
[3]
[1]
5
6
5
12
11
13
14
15
16
17
18
19
Functions
2.5 I/O Ports
Remarks
JA6
PDX21
WOL
[SSL3]
[SSL2]
[SSL1]
[SSL0]
[MISO]
[MOSI]
[TX_ER][RSPCK]
SCL
SDA
PB14
PB15
EXTAL
[NMI]
[RES]
14
AN0 [VR1]
15
AN1
16
AN2
17
AN3
18
PF4/AN4
19
PF5/AN5
20
PF6/AN6
21
PF7/AN7
WDTOVF
CRx0
CTx0
TCLKD
[6]
[RXD1]
[5]
[TXD1]
TCLKA
8
TIOC2B/RXD2
9
TIOC3A/SCK2
7
TIOC3C/TXD2
PE9/TIOC3B
PE11/TIOC3D
PE12/TIOC4A
PE13/TIOC4B
PE14/TIOC4C
PE15/TIOC4D
TIOC0A/TIOC4AS
2-8
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