Ic Block Diagrams - Mitsubishi Electric XD8100U Service Manual

IC BLOCK DIAGRAMS

ANALOG PCB-MAIN (1/9)
IC2A0 TC90103AFG
Digital I/F
8bit
Y-IN1
ADC
(CVBS)
Y-IN2 S
CVBS/Y
(S-Y) W
AGC
C
Y-IN3
AMP1
L
(D1/D2-Y)
A
C-IN
M
(S-C) S
C/G
P
8bit
W
ADC
G-IN
&
Cb-IN Cb/B
8bit
S
B
ADC
W
I
B-IN
A
S
Cr/R
Cr-IN
8bit
S
ADC
W
R-IN
FB-IN Input I/F
IC2K0 PQ1M255M2SPQ
4 5
Vin Vo
3 CONTROL
Vc
1
Nr
2
GND
IC522 RD74LVC14BTELL
1 14
1A VCC
13
6A
2
1Y
3 12
2A 6Y
11
5A
4
2Y
5 10
3A 5Y
9
4A
6
3Y
7 8
GND 4Y
FUNCTION TABLE
INPUT OUTPUT
A Y
H L
L H
AGC Det
S
AGC AMP2
W
YCS
NTSC 3D Comb
Motion Det.
3 Line Comb
Vertical
C
Enhance
TOF/ACC
Color System Det.
CbCr(D1)
Multi Color Decorder
CbCr SW
RGB–>CbCr
Matrix
LPF
VBI Data Det.
ID1,WSS,CCD,S/N,Macrovision
Sync Sep
H/V Timing
HD VD
IC2L0 TAR5S15
CONTROL 1
GND 2
NOISE 3
Function Table
Control Level
HIGH
LOW
IC530 MAX4564EKA+T
NC 1
V+
2
IN
3
NO 4
Function Table
EN IN
0 0
0 1
1 X
X = Don't Care
Clock
Gene.
Memory
Y(D2)
LTI/Contrast
Y Y Y
Brightness
(D1) (D1)
Sharpness
NR Mode:
CbCr
3DNR
CbCr CTI/TINT CbCr
CbCr
Color Level
(D1)
CbCr(D2)
Y
Y
Contrast/Brightness
CbCr
CbCr
Color Level
5 VIN
4 VOUT
Operation
ON
OFF
COM
8
EN
7
6 V–
5
GND
NC NO
ON OFF
OFF ON
OFF OFF
- B1 -
42M
X'tal
Reference
Clock
Y
ITU-R656
Mix 656/601
/601
FB SW
Format
Encode
CbCr
IIC-BUS
SCL SDA
IC520, IC521 NC7SZ157P6X(PBF)
I1 1
1
GND 2
0
I0 3
Function Table
Inputs
S I1
L X
L X
H L
H X
H : HIGH Logic Level
L : LOW Logic Level
IC540 24LCS21AT-I*SNG
WP
8
VCC
I/O Memory
Control Control
Logic
Logic
4
VSS
6 7
5
SDA SCL VCLK
6 S
5 VCC
4 Z
Output
I0 X=(I0)•(S)+(I1)•(S)
L L
H H
X L
X H
3
HV
Generator
EEPROM
Array
XDEC
Page
Laches
YDEC
Sence Amp.
R/W Control