Dynamic Code Relocation - Intel iAPX 86/88 User Manual

8086/8088 CPU
BEFORE RELOCATION
AFTER RELOCATION
CODE
SEGMENT
I
CS
CS
J
SS
STACK
-
DS
SEGMENT
,.....
ES
SS
DS
-
ES
-
DATA
SEGMENT
CODE
SEGMENT
STACK
SEGMENT
DATA
SEGMENT
EXTRA
EXTRA
SEGEMENT
SEGMENT
r::::::J
FREE SPACE
Figure 1-13 Dynamic Code Relocation
copying it from 'IDS and the
incrementing
SP by 2. In
other words, the stack goes
down
in memory toward its
base address. Stack operations never move items on the
stack, nor do they erase them. The top of the stack
changes only as a result of updating the stack pointer.
RESERVED MEMORY
Two areas in extreme low and high memory (see Figure
1-15) are dedicated to specific processor functions or are
reserved by Intel Corporation for use by Intel hardware
and software products. The locations are OH through 7FH
(128 bytes) and FFFFOH through FFFFFH (16 bytes).
These areas are used for interrupt and system reset proc-
essing. 8086 and 8088 application systems do not use
these areas for any other purpose. Doing so may make
these systems incompatible with future Intel products.
8086/8088 MEMORY ACCESS DIFFERENCES
The 8086 can access either 8 or 16 bits of memory at a
time. If an instruction refers to a word variable and that
variable is located at an even-numbered address, the 8086
1-11
accesses the complete word in one bus cycle. If the word
is located at an odd-numbered address, the 8086 accesses
the word one byte at a time in two consecutive bus cycles.
To maximize throughput in 8086-based systems, 16-bit
data should be stored at even addresses (should be
word-aligned). This is particularly true of stacks. Un-
aligned stacks can slow a system's response to interrupts.
Nevertheless, except for the performance penalty,
word alignment is totally transparent
to
software. This
allows maximum data packing where memory space is
constrained.
The 8086 always fetches the instruction stream in words
from even addresses except that the first fetch after a pro-
gram transfer to an odd address obtains a byte. The in-
struction stream is disassembled inside the processor and
instruction alignment will not materially affect the per-
formance of most systems.
The 8088 always accesses memory in bytes. Word oper-
ands are accessed in two bus cycles regardless of their
alignment. Instructions are also fetched one byte at a
time. Although alignment of word operands does not
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