Clock Interface; Crt And Tv Interface; Table 3-7 Clock Interface; Table 3-8 Crt And Tv Interface - AMD RS690M Technical Reference Manual

3.6

Clock Interface

Table 3-7 Clock Interface

Pin Name
TVCLKIN
HTREFCLK
HTTSTCLK
GFX_REFCLKP,
GFX_REFCLKN
SB_CLKP,
SB_CLKN
OSCIN
3.7

CRT and TV Interface

Table 3-8 CRT and TV Interface

Pin Name
RED
GREEN
BLUE
Y
C
COMP
DACHSYNC
DACVSYNC
RSET
DACSDA
DACSCL
41978 AMD RS690M Databook 3.06
3-10
Power Ground
Type
Domain Domain
I VDDR3 VSS
I HTPVDD HTPVSS
I HTPVDD HTPVSS
I VDDPCIE VSSAPCIE
I VDDPCIE VSSAPCIE
I VDDR3 VSS
Power Ground
Type
Domain Domain
A-O AVDD AVSSN
A-O AVDD AVSSN
A-O AVDD AVSSN
A-O AVDD AVSSN
A-O AVDD AVSSN
A-O AVDD AVSSN
A-O VDDR3 VSS
A-O VDDR3 VSS
Other N/A AVSSQ
I/O VDDR3 VSS
I/O VDDR3 VSS
Integrated
Functional Description
Termination
Input pin for reference clock for external TV-out support (3.3V
signaling).
For the RS690T only: SUS_STAT# from the SB can be connected to
–
this signal for putting the side-port memory into self-refresh before a
system warm reset; that would allow a more graceful reset of the
side-port memory interface.
- HyperTransport 66MHz reference clock from external clock source
HyperTransport Bus Test Clock. Drives test clock in test mode.
-
Connect to ground in functional mode.
50Ω between Clock Differential Pairs for external graphics. Connect to external clock
complements generator when an external graphics card is implemented.
Clock Differential Pair for the Southbridge and general purpose PCI
50Ω between
®
Express (PCI-E) devices. Connect to an external clock generator on
complements
the motherboard.
14.3181818MHz Reference clock input from the External Clock chip
Disabled
(3.3 volt signaling).
Integrated
Termination Functional Description
– Red for CRT monitor output, Cr or Pr for component video TV output
– Green for CRT monitor output, or Y for component video TV output
– Blue for CRT monitor output, Cb or Pb for component video TV output
– SVID luminance output for TV out, or Y for component video TV output
SVID chrominance output for TV out, or Pr for component video TV
–
output
– Composite video TV output, or Pb for component video TV output
50kΩ
programmable: Display Horizontal Sync
PU/PD/none
50kΩ
programmable: Display Vertical Sync
PU/PD/none
DAC internal reference to set full scale DAC current through 1%
–
resistor to AVSS
50kΩ
2
programmable: I C Data for display (to video monitor)
PU/PD/none
50kΩ
2
programmable: I C Clock for display (to video monitor)
PU/PD/none
Clock Interface
© 2008 Advanced Micro Devices, Inc.
Proprietary