Lvds Interface; 2.3.1 Lvds Data Mapping; Figure 2-5 Single/Dual Channel 24-Bit Lvds Data Transmission Ordering - AMD RS690M Technical Reference Manual

2.3

LVDS Interface

The RS690M contains a dual-channel 24-bit LVDS interface. Notice that for designs implementing only a single LVDS
channel, the LOWER channel of the interface should be used.

2.3.1 LVDS Data Mapping

Figure 2-5 below shows the transmission ordering of the LVDS signals on the lower and the upper data channels.
The signal mappings for single and dual channel transmission are shown in
TXCLK_L-/+
TXOUT_L0-/+
TXOUT_L1-/+
TXOUT_L2-/+
TXOUT_L3-/+
TXCLK_U-/+
TXOUT_U0-/+
TXOUT_U1-/+
TXOUT_U2-/+
TXOUT_U3-/+

Figure 2-5 Single/Dual Channel 24-bit LVDS Data Transmission Ordering

41978 AMD RS690M Databook 3.06
2-6
T Cycle
LP1C7 LP1C6 LP1C5 LP1C4
LP2C7 LP2C6 LP2C5 LP2C4
LP3C7 LP3C6 LP3C5 LP3C4
LP4C7 LP4C6 LP4C5 LP4C4
T Cycle
UP1C7 UP1C6 UP1C5 UP1C4
UP2C7 UP2C6 UP2C5 UP2C4
UP3C7 UP3C6 UP3C5 UP3C4
UP4C7 UP4C6 UP4C5 UP4C4
Table 2-3 and Table 2-4
LP1C3 LP1C2 LP1C1
LP2C3 LP2C2 LP2C1
LP3C3 LP3C2 LP3C1
LP4C3 LP4C2 LP4C1
UP1C3 UP1C2 UP1C1
UP2C3 UP2C2 UP2C1
UP3C3 UP3C2 UP3C1
UP4C3 UP4C2 UP4C1
© 2008 Advanced Micro Devices, Inc.
LVDS Interface
respectively.
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