Management Engine (Me); Introduction To The Renesas Ipmi Controller; Bmc Subsystem Features - Supero X9DRG-QF User Manual

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the PCH, pro-
vides Server Platform Services (SPS) to your system. The services provided by
SPS are different from those provided by the ME on client platforms.
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Introduction to the Renesas IPMI Controller

This motherboard incorporates the Renesas IPMI Controller, which integrates a
RISC (Reduced _Instruction_Set_Computing) CPU Core with peripheral capabilities,
offering a superb solution to manage PC server systems with great efficiency.
The BMC controller supports a 32Kb_instruction cache and a 32Kb_operand cache,
which can be switched between write-back and write-through. The instruction cache
offers a 4-way full-associative instruction TBL (Translation Lookaside Buffer) and
a 64-way full-associative shared TBL. The memory management unit, which is
embedded on the chip, provides access to 4 Gb virtual address space. In addition,
this controller also supports 32 Kb on-chip SRAM, allowing for faster access that is
critical to time-sensitive, high-density/high-performance server platforms.
The BMC supports VGA Graphic Cores for remote video displaying and editing. It
also provides a video data compressor for Keyboard/Video/Mouse (KVM) support.
With two Ethernet controllers built in, the BMC controller supports USB media host-
ing, an LPC bus interface, an I
serial communication interfaces. The BMC controller offers great system enhance-
ment at a low cost.

BMC Subsystem Features

•
CPU speed: 576MHz
•
System Memory: 256MB
•
Flash Memory: 32MB
•
Network connections: Two Gigabit connections (One dedicated LAN connection
and one shared LAN with an on-board LAN controller)
•
Resolution:
•
Supports 1600 x 1200 resolution at 32 bpp and 75 Hz
•
Supports 1680 x 1050 wide screen resolution at 32 bpp and 60 Hz
Note: The term "IPMI controller" and the term "BMC controller" can be
used interchangeably in this section.
C bus interface, a NAND Flash Timer Interface and
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Chapter 1: Overview