2.7. VHiSii9011L-1Q (ASSY: IC1508)
HDMI/DVI Receiver
•
Block Diagram [VHiSii9011L-1Q (ASSY: IC1508)]
•
Pin Function [VHiSii9011L-1Q (ASSY: IC1508)]
Pin No.
Digital Video Output Pins
92, 93, 94, 95, 96, 99, 100,
101, 102, 103, 104, 105, 108,
109, 110, 111, 114, 115, 116,
117, 121, 122, 123, 124
2, 3, 4, 5, 8, 9, 10, 11, 14, 15,
16, 17, 20, 21, 22, 23, 26, 27,
28, 29, 32, 33, 34, 35
127
128
1
119
Digital Audio Output Pins
85
84
79
76
75
74
73
72
71
70
67
Configuration/Programming Pins
91
89
Pin Name
I/O
QE23-0
O
24-Bit Even Pixel.
QO23-0
O
24-Bit Odd Pixel.
DE
O
Data enable.
HSYNC
O
Horizontal Sync.
VSYNC
O
Vertical Sync.
ODCK
O
Output Data Clock.
XTALIN
I
Crystal Clock Input.
XTALOUT
O
Crystal Clock Output.
MCLK
I/O
Audio Master Clock Input Reference.
SCK
O
I2S Serial Clock Output.
WS
O
I2S Word Select Output.
SD0
O
I2S Serial Data Output.
SD1
O
I2S Serial Data Output.
SD2
O
I2S Serial Data Output.
SD3
O
I2S Serial Data Output.
SPDIF
O
S/PDIF Audio Output.
MUTE
O
Mute Audio Output.
INT
O
Interrupt Output.
RESET#
I
Reset Pin. Active LOW.
Pin Function
5 – 27
LC-37D90U