Chipset Configuration; Cpu Bridge Configuration - Supero SuperWorkstation 5037A-IL User Manual

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orkstation 5037A-IL User's Manual

Chipset Configuration

WARNING: Setting the wrong values in the following sections may cause the system
to malfunction.

CPU Bridge Configuration

This item displays the current CPU Revision, Current CPU1 Memory Fre-
quency, Memory Type and Memory Reference Code Revision.
Memory Frequency
This feature allows the user to select the memory speed. Under normal
conditions, please set this to Auto. The options are Auto, Force DDR-
1066, and Force DDR-1333.
Integrated IO Configuration
This item displays the current North Bridge Revision.
VT-d
Select Enabled to enable Intel's Virtualization Technology support for
Direct I/O VT-d by reporting the I/O device assignments to VMM through
the DMAR ACPI Tables. This feature offers fully-protected I/O resource-
sharing across the Intel platforms, providing the user with greater reliabil-
ity, security and availability in networking and data-sharing. The settings
are Enabled and Disabled.
Active State Power Management
Select Enabled to start Active-State Power Management for signal
transactions between L0 and L1 Links on the PCI Express Bus. This
maximizes power-saving and transaction speed. The options are Enabled
and Disabled.
PCIE Maximum Read Request
This feature selects the setting for the PCIE maximum payload size. The
options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048
Bytes, and 4096 Bytes.
PCI Express Port
This feature can force to enable or disable the onboard PCI Express port.
The options are Disabled, Enabled and Auto.
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