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I
• Description of Hybrid le RMPTHOO01PAZZ for GP·IB,
The hybrid IC mounted, on the GP·IB interface MZ·8BI04 of MZ·80B integrates the hand shake logic, bus driver/
receiver, etc. which are the proper circuits of GP·IB circuit, into one package. By connecting this HIC (hybrid IC)
to the I/O
ports
of an ordinary microcomputer, the functions of T
6 ,
4,
SH
1
and
AHI
and the inputting and
CJutputting of the l1'Ianagement line and data line are enabled.
Data line (
I nternal register (
read/write pulse
DB,
I
DB.
Wl
R1
W2
I nput to hand
shaka line and
management line
OAV(R)
NRFO(R)
NOAC(R)
EOUR)
ATN(R)
SRO(R)
IFC(R)
REN(R)
Management
ATN(O)
line output
SRO(O)
[
EOHO)
IFC(O)
Enabling manage. REN(O)
ment lines other ENABLE
than EOI
Reporting of
[T ACS
Internal logic
LACS
status
SPAS
Reset .ignal
CLR
Waiting time
~
NBA
setting
NBAW
Waiting time
~
ACCS
setting
CMAC
• Block Diagram of Hybrid le'
27
-~-
?g
19
16
2
3
4
lIE
5
-~-
7
-~
9
11
2
13
4
15
10
49
50
51
47
55
52
53
54
D7
De
D5
D4
D3
D2
D1
DO
DATA LINE
DAV R
NRFOR
NDACR
EOI
R
ATN R
SRQ R
IFC
R
REN R
~§~
W2
GND(E)
..
.
30
HOOO1PA
31
32
33
34
35
36
37
3B
39
40
41
43
44
45
46
42
11
1171561~2~48
Vcc
GNO
DATA
PORT
t - - . - J
ClR
~~~~~~i~~~~~~~J
CMAC
Aces
NB':
LACS
TACS
SPAS
EOI D
ATND
SROD
IFC D
RENO
20
Driver /Receiver
0108
0107
0106
0105
0104
0103
0102
0101
SRO
IFC
REN
ATN
OAV
NRFO
NOAC
EOI
SG
GP·IB line
Signal groun"d
0108
0107
0106
0105
0104
0103
0102
0101
rr-.......
==-=-......
slgnal
GND
DAV
NRFD
NDAC
EOI
ATN
SRQ
IFC
REN
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