Toshiba TLP411E Technical Training Manual page 60

LCX016 SVGA 800x600
MODE3/2/1 : H/L/L MODE : H DWN : H VP : LLHLLLHH(LSB) MBK2/1/0/B/A : H/H/H/L/L VVPO : L FRP1/0 : H/H DSP : H PC98 : H
VSYNC
HSYNC
HD
HDN
594 600
(BLK)
VST
VCK
FRP
(1H reverse)
HST
ENB
XCLP1
XCLP2
PCG
PRG
CLR
FRP
(1F reverse)
FLDO
BLK
Note : DWN : VST is inverted at L. Upper fifth line (BLK) of the timing chart is not an actual pulse output from the terminal.
The pulse is drawn as temporary pulse to create the chart.
FRP/FCDO polarity for 1H and 1V frequency is not specified.
Fig. 6-26 Example of timing signal (2)
6-22
1 10 20
1 2
30 37