Power Supply; On-Screen Circuit; Video Input Circuit; Definition Converter Lsi Peripheral Circuit - NEC MultiSync LCD1525V Service Manual

1. Power supply

1. I/02:DC-DC converter
A 5V power supply for LCD module, CPU, and logic is generated from the 12V source.
2. I/03:3-terminal regulator
A 3.3V power supply for LCD module is generated from the 5V source.
3. I/03:3-terminal regulator
A 3.3V power supply for IC14 analog is generated from the 5V source.
4. I/03:3-terminal regulator
A3.3V power supply for IC14 digital is generated from the 5V source.
Q301, I301 ON/OFF control for LCD Module
ON/OFF control is performed for power ON/OFF and also for the power saving sequence.

2. On-screen circuit

I402 (M35072-057FP) is an OSD IC.
The HREF Signal, the OSDVS signal (horizontal/vertical sync signal in negative polarity), and the OSDCLK
signal (dot clock for OSD display) are received from I401 (Circuit diagram MAIN PWB 3/10 B135), and data
of the OSDDAT signal (pin 5) are picked up from the OSDSTB signal (pin 6) that is generated from I208 .
Using these data, and On-screen menu screen is established and the resultant data are output to IC401.

3. Video input circuit

The AC-coupled video signal is used to clamp the black level at 0V.

4. Definition converter LSI peripheral circuit

I401 (B135) is the definition converter LSI.
The analog R, G, B signal input entered from the video input circuit is converted into the digital data of video
signal through the incorporated A/D converter. Based on this conversion, this device performs interpolation
during pixel extension. The source voltage for this device is 3.3V and the system clock frequency is 50MHz.
The withstand voltage level for the input signal voltage if I401 is 3.3V and 5V.
5. System reset, LED control circuit
5.1 System reset
System reset is performed by detecting the rising and falling of the 5V source voltage at I207.
5.2 LED control circuit
Green/amber is lit with the control signal of the LED GREEN and LED AMBER signal pin 15, 12 from I208.
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6. E PROM
Data transfer between I205 (AT24C16) and CPU (Circuit diagram MAIN PWB 2/10) (I201) is effected through
the IIC bus SCL (pin 15) and SDA (pin 16) of I201. The data to be transferred to each device are stored in
I205.
• IC14 control data
• OSD related setting data.
• Other control data for service menu.
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