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Table A–12 shows the PCI target window mask fields.
Table A–12 PCI Target Window Mask Register Fields
PCI_MASK<31:20>
0000 0000 0000
0000 0000 0001
0000 0000 0011
0000 0000 0111
0000 0000 1111
0000 0001 1111
0000 0011 1111
0000 0111 1111
0000 1111 1111
0001 1111 1111
0011 1111 1111
0111 1111 1111
1111 1111 1111
Otherwise
1
Only the incoming ad<31:n> are compared with <31:n> of the window base register, as shown in
Figure 1–18. If n=32, no comparison is performed.
Based on the value of the window mask register, the unmasked bits of the incoming
PCI address are compared with the corresponding bits of each window's window
base register. If one of the window base registers and the incoming PCI address
match, then the PCI address has hit the PCI target window. Otherwise, the PCI
address has missed the window. A window enable bit, W_EN, is provided in each
window's window base register to allow windows to be independently enabled
(W_EN = 1) or disabled (W_EN = 0).
If a hit occurs in any of the four windows that are enabled, then the 21174 will
respond to the PCI cycle by asserting the signal devsel. The PCI target windows
must be programmed so that their address ranges do not overlap; otherwise, the
results are UNDEFINED.
PCI to Physical Memory Address
Size of Window
1MB
2MB
4MB
8MB
16MB
32MB
64MB
128MB
256MB
512MB
1GB
2GB
4GB
UNPREDICTABLE
System Address Space
1
Value of n
20
21
22
23
24
25
26
27
28
29
30
31
32
—
A–33
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