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Bb Board Block Diagram (2/2) - Sony VPL-S900U Service Manual

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7-3. BB BOARD BLOCK DIAGRAM (2/2)

BB
(2/2)(SCAN CONVERTER)
IC3047
DELAY
PICLK-H
11 CLK
PICLK-H-G
12 Q8
D1 2
1
PICLK-H,PICLK-H-G
IC3042
DOUTCLK1
PULSE GENERATOR
2
2Q 9
3 CLK
D 2
Q 6
2D 12
CL 13
IC3007
CLOCK GEN.
3 Y4
20 Y2
18 Y1
OUT
CLK 16
POCLKH R
13 Q1
POCLKH G
10 Q3
POCLKH R/G/B
POCLKH B
3
8 Q4
-PIVS,FLD
4
SCLK,SI,SO
5
C 701SS R/G/B
6
-PIHS
7
B NEW0-B NEW7,B OLD0-B OLD7,PICLK
8
HS,VS
9
VPL-S900E, VPL-S900M, VPL-S900U
IC3046
DELAY
11 CLK
2 D1
IC3026 CONTROLLER
IC3011(2/2) PLL
CS 14
SEROUT 15
30 PLLSIN
24 DSYNC
SENABLE 10
26 PLLSEN
SCLK 11
27 PLLSCLK
SDATA 12
28 PLLSOUT
34 HSI
71 POCLK
70 POCLKH
-PIVS
57 PIVS
+5V
X3002
FLD
59 FLDOUT
68MHz
OE
SCLK
2 CSCLK
SO
78 CSI
SI
79 CSO
C 701SSR
7 C 63SSR
C 701SSG
8 C 63SSG
C 701SSB
9 C 63SSB
SCRST 22
36
PIDE0
SCWD 18
I
SCCLK 23
39
BNEW0-BNEW7
SCAD3/(SIN) 16
SCAD2 14
42
SCAD1 13
I
PIDE7
SCAD0 11
45
47
PID10
PID01
I
50
BOLD0-BOLD7
SCRD/(SOT) 17
52
VSI 33
I
POVS 67
55
PID07
POHS 68
PICLK
32 PICLHK
CK12 73
BB (2/2)
BB (2/2)
IC3004
D-FF
CN3003
OCLK+
1
7 D
Q 2
OCLK
2
Q 3
IC3005 BUFFER
11 Y8
A8 9
30
/SCRST
12 Y7
A7 8
26
SCWD
13 Y6
A6 7
24
SCCLK
14 Y5
A5 6
23
SCAD3
15 Y4
A4 5
22
SCAD2
16 Y3
A3 4
21
SCAD1
17 Y2
A2 3
20
SCAD0
18 Y1
A1 2
IC3006 DELAY
12
/HSO
6 A5
Y1 18
14
/VSO
13 Y6
Y2 17
16
HSTHO
3 A2
Y3 16
VSTHO
18
2 A1
Y4 15
SCRD
28
9 A8
Y5 14
HS
4 A3
VS
5 A4
7-3
7-3
G
TO
C BOARD
CN5008

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