Circuit Description
AIN
ADC_REFT
ADC_REFB
12-bit
A
/ D converter
AFE_CIP4
SRAM
1 024 x 8
( R/G/ B)
SRAM
8 192 x 8
( 2l ine)
Interrupt
IRQ
Contro l
CPU I/F
Mod ule
nCS
nRD nWR
3-22
PI_TG
PI1
PI2
Sen so r
Interface
Shadi ng
Correctio n
Gam ma
Correctio n
Enlarge men t
/ Redu ction
Vp eak
Contro l
CIP4
Register
A [5:0]
D [15:0]
nXDREQ
<Block diagram of CIP4>
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EXT SRAM
Shadi ng
Acqu isitio n
Vertical
Decimation
SRAM
Imag e
256 x 8
Processing
Mo dule
SRAM
4096 x16
(2 line )
Mo to r
Con tro l
DMA
Interface
SRAM
1 024 x 8
nXDACK
SRAM_A[ 15:0]
SRAM_D[ 15: 0]
SRAM_nRD
SRAM_nWR
TX_A, B
nTX_A, B
TX_EN1, EN2
Samsung Electronics