Circuit Description
3-2 Circuit Operation
3-2-1 Clock
1) System Clock
Device
Frequency
• ARM946ES RISC PROCESSOR: drives PLL internally uses 120MHz and external Bus uses 60 MHz.
2) Video Clock
Device
Frequency
• Fvd =((PAPER 1SCAN LINE sending time * SCAN effective late /1SCAN LINE DOT #)*4
=(600dpi*600dpi*58.208mm/s*216mm*4)/(25.4mm*25.4mm*76.1%)=28.697MHz
•PAPER 1SCAN LINE sending time=SCAN LINE interval/DOCUMENT SPEED (58.208mm/S)
•1SCAN LINE DOT #=MAZ SCAN distance(216mm)*DOT# per 1mm
3)USB Clock
Device
Frequency
3-2-2 POWER ON/OFF RESET
1) Signal Operation
Input Signal
Output Signal
RESET TIME (Td)
2) TIMING CHART
MCLK
nRESET
nPWRGD
HICLK
reRESETn
RESETn
3-2
+3.3V Power Line (VCC)
ARM946ES nRESET and 29LU16ø
• POWER ON/OFF DETECT VCC RISING/FALLING 4.5° ≠ 4.6V
1.48~1.52ms
• Td=(Ct*V sensing)/I charge (...Ct=33µF, Is=100µA)
20 MCLK
15 HCLK
- This Document can not be used without Samsung's authorization -
Oscillator
12MHz
Oscillator
57.0167MHz
Oscillator
48MHz
5.461 ms
20 MCLK
(65535 MCLK)
5.461 ms
(65535 MCLK)
CLK falling
Samsung Electronics