Samsung SCX-5315F Service Manual page 137

3-2-5-2 SDRAM write timing
0 1 2
CLOCK
CKE
CS
RAS
CAS
ADDR RAa
BA
0
BA
1
A /AP
RAa
10
DQ
WE
DQM
Row Active
(A-Bank)
Row Active
(B-Bank)
*Note : 1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst wrige by Row precharge, both the write and the prechargebanks must be the
same.
Samsung Electronics
3 4 5 6 7
RBb CAa CBb RCc
RBb
DAa0 DAa1 DAa2 DAa3 DBb0 DBb1 DBb2 DBb3 DCc0 DCc1 DDd0 DDd1 DDd2
tCDL
Write Write
(A-Bank) (B-Bank)
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8 9 10 11 12 13
HIGH
RDd CCc
*Note 2
RCc RDd
Row Active
(D-Bank)
Row Active Write
(C-Bank) (C-Bank)
Circuit Description
14 15 16 17 18
CDd
tRDL
*Note 1
Write Precharge
(D-Bank) (All Banks)
19
: Don't care
3-17