Sharp CD-MD3000H Service Manual page 100

CD-MD3000H/CD-MD3000W
ICT21 VHiLC72722/-1: RDS Decorder (LC72722) (For CD-MD3000H Only)
Pin No. Port Name
1 VREF
2 MPXIN
3 VDDA
4 VSSA
5 FLOUT
6 CIN
7 T1
8 T2
9* T3 (RDCL)
10* T4 (RDDA)
11* T5 (RSFT)
12 XOUT
13 XIN
14 VDDD
15 VSSD
16* T6
(ERROR/57K/TP/BE1)
17* T7
(CORREC/ARI-ID/TA/BE0)
18* SYNC
19* RDS-ID
20 DO
21 CL
22 DI
23 CE
24 SYR
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
(*): Normaly the output pin. Used as an I/O pin in test mode, which is not available to user applications.
Vdda
3
REFERENCE
VOLTAGE
Vssa
4
ANTIALIASING
MPXIN
2
FILTER
20
DO
CL 21
CCB
DI
22
CE 23
T1
7
8 TEST
T2
T3 to T7
Input/Output
Output Reference voltage output (Vdda/2)
Input Baseband (multiplexed0 signal input
— Analog power supply (+5V)
— Analog ground
Output Subcarrier output (fulter output)
Input Subcarrier input (comparator input)
Input Test input (This pin must always be connected to ground.)
Input Test input (standby control)
0: Normal operation 1: standby state (crystal oscillator stopped)
Input/Output (*) Test I/O (RDS clock output)
Input/Output (*) Test I/O (RDS data output)
Input/Output (*) Test I/O (soft-decision control data output)
Output Crystal oscillator output (4.332/8.664 MHz)
Input Crystal oscillator input (external reference signal input)
— Digital power supply (+5V)
— Digital ground
Input/Output (*) Test I/O (error status, regenerated carrier, TP, error block count outputs)
Input/Output (*) Test I/O (error correction status, SK detection, TA, error block count outputs)
Input/Output (*) Block synchronization detection output
Output RDS detection output
Output Data output
Input Clock input
Input Data input
Input Chip enable
Input Synchronization and RAM address reset (active high)
VREF FLOUT
1 5
57kHz
BPF
SMOOTHING
(SCF)
FILTER
RAM
(24 BLOCK DATA)
MEMORY CONTROL
Figure 100 BLOCK DIAGRAM OF IC
Serial data interface (CCB)
CIN
6
+
PLL
(57kHz)
_
VREF
ERROR CORRECTION
(SOFT DECISION)
CLK(4.332MHz)
OSC/DIVIDER
13 12
XIN XOUT
– 100 –
Function
CLOCK
RECOVERY
(1187.5Hz)
DATA
DECODER
SYNC/EC CONTROLLER
SYNC SYNC
DETECT-1 DETECT-2
14 Vddd
15
Vssd
RDS-ID
19
18 SYNC
24 SYR