Device Agp Intel740™ Graphics Accelerator Memory Configurations; Memory Layout Dimensions (Rclk And Oclk To Rclk) - Intel 740 Design Manual

Figure 3-20. Memory Layout Dimensions (RCLK and OCLK to RCLK)
3.2.4.1 3 Device AGP Intel740™ Graphics Accelerator Memory
Configurations
In the following discussion the term row refers to a set of memory devices that are simultaneously
selected by an SRAS and the CS# signal.
Configuration #1: In this configuration, the minimum amount of memory (2MB) is supported.
Note that, the same copy of all control signals goes to each component.
Figure 3-21. 2/4 MB Local Memory Connection (64-bit data path)
MD[31:0]
MD[63:32]
Intel740™ Graphics Accelerator Design Guide
Intel740™
Chip
OCLK
RCLK0
RCLK1
MD[63:0]
CSx[A:B]#
CS0A#
CS0A#
3 Device AGP MotherBoard Design
1.0 ±0.25"
33
3.0 ±0.25"
3.0 ±0.25"
Intel740™ Chip
Intel740
DQM[3:0] DQM[7:4]
256K/512K X 32
256K/512K X 32
33
MA[11:0]
RCLKx OCLK
WEA#
SRASA#
SCASA#
TCLKA
WEA#
SRASA#
SCASA#
TCLKA
3-21