Address Translation; Configuration; Default Parameters - Intel 740 Design Manual

6.0

Address Translation

Table 3 should be followed for 256Kx32 and 512Kx32 SGRAM devices. This table specifies the
SGRAM device to SO-DIMM connector connections for a 256Kx32 and 512Kx32 devices.
Table 3. Address Translation
Pin #
92
91
90
89
88
87
84
83
82
81
80
79
NOTES:
1. The names for pin 80, 81 and 82 are different for 256Kx32 and 512Kx32 device connection.
2. SO-DIMM's pin 80 (which is labeled as A10) is a no connect for 256Kx32 device and is connected to pin 30
(labeled as A8) of 512Kx32 device.
3. SO-DIMM's pin 81 (which is labeled as A9) is connected to pin 29 (labeled as A9/BA) of 256Kx32 device and
is connected to pin 29 (labeled as A10/BA) of 512Kx32 device
4. SO-DIMM's pin 82 (which is labeled as A8) is connected to pin 51 (labeled as A8/BA) of 256Kx32 device and
is connected to pin 51 (labeled as A9/AP) of 512Kx32 device.
6.1

Configuration

Graphic controllers can determine the module capabilities one of three ways; they are:
•
Using the default parameters with power-up testing
•
Using resistor strapping options on the data lines
•
Using an optional Serial Presence Detect EEPROM
Modules are required to include resistor support (3 resistors); the Serial Presence Detect EEPROM
is optional.
6.2

Default Parameters

All memory modules must meets these baseline component requirements.
Revision 0.91
SO-DIMM Module — Unbuffered SDRAM/SGRAM Graphics
SODIMM
Functionality
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10 No Connect
A11/Reserved No Connect
256Kx32
Pin # Functionality
31 A0
32 A1
33 A2
34 A3
47 A4
48 A5
49 A6
50 A7
51 A8/AP
29 A9/BA
No Connect
No Connect
512Kx32
Pin # Functionality
31 A0
32 A1
33 A2
34 A3
47 A4
48 A5
49 A6
50 A7
51 A9/AP
29 A10/BA
30 A8
No Connect No Connect
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