Intel 740 Design Manual page 219

Contents
1.0 Unbuffered Graphics SO-DIMM Module ....................................................................... 1
1.1
1.2
2.0 Mechanical Outline ....................................................................................................... 2
3.0 Environmental Requirements........................................................................................ 3
4.0 Pin Assignments ........................................................................................................... 4
5.0 Graphics SO-DIMM Block Diagram .............................................................................. 5
6.0 Address Translation ...................................................................................................... 9
6.1
6.2
6.3
6.4
7.0 Electrical Characteristics.............................................................................................12
7.1
7.2
7.3
7.4
7.5
8.0 PCB Layout Considerations........................................................................................16
8.1
8.2
8.3
9.0 Electrical Specifications ..............................................................................................21
9.1
9.2
9.3
9.4
A PCB Layout.................................................................................................................23
Revision 0.91
General Features ............................................................................................. 1
Labeling ........................................................................................................... 1
Configuration.................................................................................................... 9
Default Parameters ........................................................................................10
Resistor Strapping Options ............................................................................11
6.3.1 Clock Frequency and Memory Timing ..............................................11
6.3.2 CAS Latency .....................................................................................11
Serial Presence Detect EEPROM..................................................................11
15 nS Timing..................................................................................................12
12 nS Timing..................................................................................................12
10 nS Timing..................................................................................................13
8 nS Timing....................................................................................................13
A.C Timing Diagrams.....................................................................................14
Clock Routing and Chip Selects ....................................................................17
Address/Control Routing................................................................................18
Data Routing ..................................................................................................19
SDRAM/SGRAM Component Absolute Maximum D.C. Ratings ...................21
SDRAM/SGRAM Components D.C. Operating Requirements ......................21
SDRAM/SGRAM Components Absolute Maximum A.C. Operating Require-
ments21
Memory Timing ..............................................................................................22
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