Intel740™ Graphics Accelerator Memory Layout And Routing Guidelines; Clock Segment Solution Space; Supported Memory Options - Intel 740 Design Manual

3 Device AGP MotherBoard Design
Table 3-9. Clock Segment Solution Space
The clock lines were tuned as detailed in table
0.75 ns occurred. Note that in the case of gclks, the load is the AGP connector.
3.2.4 Intel740™ Graphics Accelerator Memory Layout and
Routing Guidelines
The Intel740 graphics accelerator integrates a memory controller that supports a 64-bit memory
data interface. SGRAM can be used in addition to SDRAM, if it is configured to perform as an
SDRAM. The Intel740 graphics accelerator generates the Row Address Strobe (SRAS[A:B]#),
Chip Selects (CS0[A:B]#, CS1[A:B]#), Column Address Strobe (SCAS[A:B]#), Byte Enables
(DQM[0:7]#), Write Enables (WE[A:B]#), and Memory Addresses (MA). The memory controller
interface is fully configurable through a set of control registers.
Eleven memory address signals (MAx[10:0]) allow the Intel740™ graphics accelerator to support
a variety of commercially available components. Two SRAS# lines permit two 64-bit wide rows of
SDRAM. All write operations must be one Quadword (QWord). The Intel740 graphics accelerator
supports memory up to 100 MHz.
Rules for populating a Intel740 graphics accelerator Memory:
•
SDRAM and SGRAM components can be mixed.
•
The DRAM Timing register, which provides the DRAM speed grade control for the entire
memory array, must be programmed to use the timings of the slowest memories installed.
Possible DRAM and system options supported by the Intel740 graphics accelerator are shown in
Table 3-10.
Table 3-10. Supported Memory Options (Other Memory Options Are Not Supported)
SDRAM/
SGRAM
Technology
8 Mbit
16Mbit
16Mbit
There are several groups of signals within the memory bus with layout restrictions.
3-18
Clock Net Driver to resistor lengths
Gclkin
Gclks
Gclk740
SDRAM/ SDRAM/
SGRAM SGRAM
Density Width
256K 32
512K 32
1M 16
0.4-0.5 Inches
0.3-0.4 Inches
0.4-0.5 Inches
Table 3-9 to ensure that no clock skew exceeding
Addressing Address Size
Row
Asymmetric 10
Asymmetric 11
Asymmetric 12
Intel740™ Graphics Accelerator Design Guide
Resistor to Load lengths
6.2-6.4 Inches
4.4-4.6 Inches
6.4-6.6 Inches
Local Memory
Size
Column Min Max
8 2MB 4MB
8 4MB 8MB
8 8MB 8MB