CompactFlash Memory Card Interface Description
t c (W)
A[10:0], -REG
t su (CE-WEH)
t su (CE)
-CE
NOTE 1
NOTE 1
t su (A-WEH)
t h (CE)
NOTE 4
NOTE 4
-OE
t su (A)
t rec (WE)
t w (WE)
NOTE 3
-WE
t h (OE-WE)
t su (D-WEH)
t su (OE-WE)
t h (D)
NOTE 2
D[15::0](Din)
DATA INPUT ESTABLISHED
t dis (WE)
t dis (OE)
t en (OE)
t en (WE)
D[15::0](Dout)
1. Shaded areas may be high or low.
2. When the data I/O pins are in the output state, no signals shall be applied to the data pins (D[15::0]) by the
host system
3. May be high or low for write timing, but restrictions on -OE from previous figures apply.
4. SanDisk CompactFlash Memory Cards do not assert the -WAIT signal.
Figure 3-2. Common and Attribute Memory Write Timing Diagram
®
CompactFlash
Memory Card Product Manual, Rev. 10.0 © 2002 SANDISK CORPORATION
3-11
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