Epson TM-U950 Technical Manual page 74

CONFIDENTIAL
Reset circuit for the TM-U950
The reset IC (M51953BFP) monitors the +5 V voltage. When the voltage becomes more than 4.5
V, the IC releases the reset condition for the CPU and other circuits, thus enabling normal
printer operation. When a reset signal from the host is sent from the host interface (DSR, #25)
more than 1 ms, the output of the reset IC becomes low and the CPU and other circuits are reset.
Reset circuit for the TM-U950P
The reset IC (M51953BFP) monitors the +5 V voltage. When the voltage becomes more than 4.5
V, the IC releases the reset condition for the CPU and other circuits, thus enabling normal
printer operation. When the interface reset signal (nInit, #31) is added to the reset circuit more
than 50 µs when the host interface is in forward direction transmission (I/F signal 1284 ACT, #36
is low), the reset IC becomes low and the CPU and other circuits are reset.
CN1
1284ACT
Rev. A
Figure 2-44. Reset Circuit for the TM-U950
+5V
DSW2
DM1
7 2
nInit
8 1
Figure 2-44a. Reset Circuit for the TM-U950P
+5V
R14
R11
Q10
Q4
C19
3 RESCTL
SG
Mechanism Configuration and Operating Principles 2-29
TM-U950/U950P Technical Manual
R12
R13
7 6
IN OUT
5 4
C GND RESET OUT
+ C35
C17
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