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Hardware Manual Document No.: L-750e_1 SBC Prod. No.: PCA-A-M1-xxx CB Prod. No.: PBA-A-01 Edition: June 2010 A product of a PHYTEC Technology Holding company...
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PHYTEC Messtechnik GmbH neither gives any guarantee nor accepts any liability whatsoever for consequential damages resulting from the use of this manual or its associated product. PHYTEC Messtechnik GmbH reserves the right to alter the information contained herein without prior notification and accepts no responsibility for any damages which might result.
Conventions, Abbreviations and Acronyms ..........1 Preface......................3 Introduction..................7 1.1 Block Diagram ................10 1.2 View of the phyCARD-M ............11 1.3 Minimum Requirements to Operate the phyCARD-M....13 Pin Description .................. 14 Jumpers....................22 Power....................27 4.1 Primary System Power (VCC_3V3) .......... 27 4.2 Standby Voltage (VBAT)............
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13.1 Signal configuration (J21)............60 Technical Specifications ..............61 Component Placement Diagram ............. 64 Hints for Handling the phyCARD-M ..........66 The phyCARD-M on the phyBase........... 67 17.1 Concept of the phyBASE Board ..........68 17.2 Overview of the phyBASE Peripherals ........70 17.2.1 Connectors and Pin Header...........
Conventions, Abbreviations and Acronyms Conventions, Abbreviations and Acronyms This hardware manual describes the PCA-A-M1 Single Board Computer in the following referred to as phyCARD-M. The manual specifies phyCARD-M's design function. Precise specifications for the Freescale i.MX35 microcontrollers can be found in the enclosed microcontroller Data Sheet/User's Manual.
SBC standby voltage input Table 1: Abbreviations and Acronyms used in this Manual Note: The BSP delivered with the phyCARD-M usually includes drivers and/or software for controlling all components such as interfaces, memory, etc.. Therefore programming close to hardware at register level is not necessary in most cases.
Preface As a member of PHYTEC's new phyCARD product family the phyCARD-M is one of a series of PHYTEC Single Board Computers (SBCs) that can be populated with different controllers and, hence, offers various functions and configurations. PHYTEC supports a...
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(particularly in respect to the pin header row connectors, power connector and serial interface to a host-PC). Implementation of PHYTEC products into target devices, as well as user modifications and extensions of PHYTEC products, is subject to renewed establishment of conformity to, and certification of, Electro Magnetic Directives.
Introduction 1 Introduction The phyCARD-M belongs to PHYTEC’s phyCARD Single Board Computer module family. The phyCARD SBCs represent the continuous development of PHYTEC Single Board Computer technology. Like its mini-, micro- and nanoMODUL predecessors, the phyCARD boards integrate all core elements of a microcontroller...
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0402-packaged SMD components and laser-drilled microvias are used on the boards, providing phyCARD users with access to this cutting edge miniaturization technology for integration into their own design. The phyCARD-M is a subminiature (60 x 60 mm) insert-ready Single Board Computer populated...
Introduction 1.3 Minimum Requirements to Operate the phyCARD-M Basic operation of the phyCARD-M only requires supply of a +3V3 input voltage with 600 mA load and the corresponding GND connection. These supply pins are located at the phyCARD-Connector X2: VDD_3V3_IN: 1A, 2A, 3A, 1B, 2B, 3B Connect all +3.3V VCC input pins to your power supply and at least...
(SMT) connector (0.635 mm) lining on side of the module (referred to as phyCARD-Connector). This allows the phyCARD-M to be plugged into any target application like a "big chip". The numbering scheme for the phyCARD-Connector is based on a two dimensional matrix in which column positions are identified by a letter and row position by a number.
The following figure illustrates the numbered matrix system. It shows a phyCARD-M with SMT phyCARD-Connectors on its underside (defined as dotted lines) mounted on a Carrier Board. In order to facilitate understanding of the pin assignment scheme, the diagram presents a cross-view of the phyCARD-module showing these phyCARD-Connectors mounted on the underside of the module’s...
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Table 3 provides an overview of the Pin-out of the phyCARD-Connector with signal names and descriptions specific to the phyCARD-M. It also provides the appropriate signal level interface voltages listed in the SL (Signal Level) column and the signal direction.
(connector side). Table 4 below provides a functional summary of the solder jumpers which can be changed to adapt the phyCARD-M to your needs. It shows their default positions, and possible alternative positions and functions. A detailed description of each solder jumper can be found in the applicable chapter listed in the table.
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On many memory devices pin 7 enables/disables the (0402 activation of a write protect function. It is not guaranteed that the standard serial memory populating the phyCARD-M will have this write 7.3.2 protection function. Please refer to the corresponding memory data sheet for more detailed information.
X2 in detail. 4.1 Primary System Power (VCC_3V3) The phyCARD-M operates off of a primary voltage supply with a nominal value of +3.3V. On-board switching regulators generate the 1.375V, 1.5V, 1.8V, 2.775V, and 3.3V voltage supplies required by the i.MX35 MCU and on-board components from the primary 3.3V...
4.2 Standby Voltage (VBAT) For applications requiring a standby mode a secondary voltage source of 3.3V can be attached to the phyCARD-M at pin X2B6. This voltage source is supplying the core and on-chip peripherals of the i.MX35 (e.g. EMI, PLL, etc.), as well as the SDRAM and the EEPROM at U6 while the primary system power (VCC_3V3) is removed.
4.4 Supply Voltage for external Logic The voltage level of the phyCARD's logic circuitry is VDD_3V3 (3.3V) and equals the supply voltage of the phyCARD-M. Thus connecting external devices to the phyCARD-M does not require any special precautions. This means that external devices could be supplied from the same power source as the phyCARD-M.
Three pins of the X-Arc bus are designated for this purpose. nPower_off and nSuspend_to_RAM are output pins which can be used to indicate the power status of the phyCARD-M, whereas X_WAKEUP is an input pin to apply a wake up signal to the phyCARD-M.
(X2A50) and/or X_BOOT[1] (X2B50) according to Table 8. Additional boot configuration settings are obtained either from programmable eFuses or by contacts sampled at POR. On the phyCARD-M the boot configuration is set up by 10k pull-up/ pull-down resistors which are Table 9 tied to the corresponding CSI-Signals.
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System Configuration and Booting The standard phyCARD-M module with 128MB NAND Flash comes with a boot configuration of ‘0001010001’, so the system will boot from the 8-bit NAND Flash at CS0. For further information please see the i.MX35 Reference Manual.
7.1 DDR2-SDRAM (U8 - U11) The RAM memory of the phyCARD-M in comprised of up to four 16- bit wide DDR2-SDRAM chips at U8 - U11. They are connected to the special SDRAM interface of the i.MX35 processor, configured for 32- bit access, and operating at the maximum frequency of 133MHz.
System Memory 7.2 NAND Flash Memory (U13) Use of Flash as non-volatile memory on the phyCARD-M provides an easily reprogrammable means of code storage. The following Flash devices can be used on the phyCARD-M: Manufacturer NAND Flash P/N Density (MByte)
7.3.2 for further details on setting this jumper. 7.3.1 Setting the EEPROM Lower Address Bits (J1, J3, The 4KB I²C EEPROM populating U6 on the phyCARD-M module has the capability of configuring the lower address bits A0, A1, and A2.
EEPROM write protection states via J16 7.4 Memory Model There is no special address decoding device on the phyCARD-M, which means that the memory model is given according to the memory mapping of the i.MX35. Please refer to the i.MX35 Reference Manual for more information on the memory mapping.
8 SD / MMC Card Interfaces The X-Arc bus features an SD / MMC Card interface. On the phyCARD-M the interface signals extend from the controllers first Enhanced Secure Digital Host Controller (SDIO1) to the phyCARD- Connector. Table 13 shows the location of the different interface signals on the phyCARD-Connector.
[PCA-A-M1-xxx] 9 Serial Interfaces The phyCARD-M provides seven serial interfaces some of which are equipped with a transceiver to allow direct connection to external devices: High speed UART (TTL, derived from UART1 of the i.MX35) with up to 4.125Mbit/s and hardware flow control (RTS and CTS signals) High speed USB OTG interface extend from the i.MX35 USB...
X2A5 and X2B5 at one of the supply rails should be used when connecting these interfaces to external devices. Unlike on the phyCARD-M the voltage level of interface signals is different from the primary supply voltage on other phyCARDs. Please pay special attention to the Signal Level (SL) column in the following tables.
USB Standard-A (for USB host), USB Standard-B (for USB device), or USB mini-AB (for USB OTG) connector is all that is needed to interface the phyCARD-M USB OTG functionality. The applicable interface signals can be found on the phyCARD-Connector as shown in Table 15.
U16. They are installed prior to delivery and must not be changed. An external USB Standard-A (for USB host connector is all that is needed to interface the phyCARD-M USB Host functionality. The applicable interface signals (D+/D-/ /PSW/FAULT) can be found on the phyCARD-Connector.
[PCA-A-M1-xxx] 9.4 Ethernet Interface Connection of the phyCARD-M to the world wide web or a local area network (LAN) is possible using the integrated FEC (Fast Ethernet Controller) of the i.MX35. The FEC operates with a data transmission speed of 10 or 100 Mbit/s.
An example for the external circuitry is shown in the phyCARD's Design Guide. If you are using the applicable Carrier Board for the phyCARD-M (part number PBA-A-01), the external circuitry mentioned above is already integrated on the board (refer to section 17.3.4).
In order to guarantee that the MAC address is unique, all addresses are managed in a central location. PHYTEC has acquired a pool of MAC addresses. The MAC address of the phyCARD-M is located on the bar code sticker attached to the module. This number is a 12-digit HEX value.
SPI Interface Signal Location 9.7 Synchronous Serial Interface (SSI) The Synchronous Serial Interface (SSI) interface of the phyCARD-M is a full-duplex, serial port that allows to communicate with a variety of serial devices, such as standard codecs, digital signal processors...
Location of GPIO and IRQ pins As can be seen in the table above the voltage level is VDD_3V3, which is 3.3V and equals the supply voltage of the phyCARD-M. Thus connecting external devices to the phyCARD-M does not require any special precautions.
[PCA-A-M1-xxx] 11 Debug Interface (X1) The phyCARD-M is equipped with a JTAG interface for downloading program code into the external flash, internal controller RAM or for debugging programs currently executing. The JTAG interface extends to a 2.0 mm pitch pin header at X1 on the edge of the module PCB.
Pin 2 of the JTAG connector is on the controller side of the module. Note: The JTAG connector X1 only populates phyCARD-M modules with order code PCA-A-M1-D. JTAG connector X1 is not populated on phyCARD modules with order code PCA-A-M1. We recommend integration of a standard (2 mm pitch) pin header connector in the user target circuitry to allow easy program updates via the JTAG interface.
PHYTEC offers a JTAG-Emulator adapter (order code JA-002) for connecting the phyCARD-M to a standard emulator. The JTAG- Emulator adapter extends the signals of the module's JTAG connector to a standard ARM connector with 2 mm pin pitch. The JA-002...
LVDS Display Interface 12 LVDS Display Interface The phyCARD-M uses a DS90C383 4-Channel 24-Bit LVDS Transmitter (U32) to generate LVDS-Signals from the parallel TTL Display Interface. Thus you can connect a LVDS-Display to the phyCARD-M. The location of the applicable interface signals (X_TXOUT1-3+/X_TXOUT1-3-/X_TXCLK+/TXCLK-) found in the table below.
[PCA-A-M1-xxx] 12.1 Signal configuration (J22) J22 selects rising, or falling edge strobe for the LVDS Transmitter at U4 used for the display connectivity of the phyCARD-M. Positio Description Type falling edge strobe used for the LVDS display 10k (0805)
Camera Interface Signal Location 13.1 Signal configuration (J21) J21 selects rising, or falling edge strobe for the LVDS Deserializer at U5 used for the display connectivity of the phyCARD-M Position Description Type rising edge strobe used for the LVDS camera...
[PCA-A-M1-xxx] 16 Hints for Handling the phyCARD-M • Modifications on the phyCARD Module Removal of various components, such as the microcontroller and the standard quartz, is not advisable given the compact nature of the module. Should this nonetheless be necessary, please ensure that the board as well as surrounding components and sockets remain undamaged while de-soldering.
This modular development platform concept is depicted in Figure 14 below and includes the following components: • the phyCARD-M Module populated with the i.MX35 processor and all applicable SBC circuitry such as DDR SDRAM, Flash, PHYs, and transceivers to name a few.
The phyCARD-M on the phyBASE 17.2.1 Connectors and Pin Header Table 28 lists all available connectors on the phyBASE. Figure 15 highlights the location of each connector for easy identification. Reference Description Designator Section 17.3.9 Stereo Microphone input connector 17.3.9 Stereo Line Out connector 17.3.9...
17.2.2 Switches The phyBASE is populated with some switches which are essential for the operation of the phyCARD-M module on the Carrier Board. Figure 15 shows the location of the switches and push buttons. Button Description Section System Reset Button –...
The phyCARD-M on the phyBASE Switches 7 and 8 of DIP-Switch S3 map the S3_7/ two slave select signals of the SPI interface S3_8 and the two GPIO_IRQ signals (GIO0_IRQ, GPIO1_IRQ) to two of the three available connectors. 17.3.7.1 17.3.11 SS0/GPIO0 ->...
The phyCARD-M on the phyBASE open C device address of LED dimmer set to 0xC2 Jumper J3 configures the I C address of the touch screen controller at U28 17.3.7.3 17.3.10 C device address set to 0x88 C device address set to 0x82...
[PCA-A-M1-xxx] 17.3 Functional Components on the phyBASE Board This section describes the functional components of the phyBASE Carrier Board supporting the phyCARD-M. Each subsection details a particular connector/interface and associated jumpers for configuring that interface. 17.3.1 phyCARD-M SBC Connectivity (X27)
The phyCARD-M on the phyBASE 17.3.2 Power Supply (X28) X3 X2 X1 USB OTG AUDIO RS232 Ethernet Expansion 2 Expansion 1 ON / OFF BAT1 Reset MMC / SD card JP2 JP1 Figure 19: Power adapter Caution: Do not use a laboratory adapter to supply power to the Carrier Board!
» All power LEDs should light up and the phyCARD puts serial output to serial line 0 at P1. For powering down the phyCARD-M button S2 should be pressed for a minimum time of 2000ms. Press button S2 for a maximum time of 1000ms seconds.
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In SUSPEND mode only the standby voltage VSTBY for the phyCARD-M and the standby voltage (VCC3V3STBY) of the phyBASE itself are generated. This means the phyCARD-M is supplied only by VSTBY. The RUN and OFF state can be entered using the power button S2 as described in the gray box above.
Connector P1 is a DB9 sub-connector and provides a connection interface to UART1 of the i.MX35. The TTL level signals from the phyCARD-M are converted to RS-232 level signals. UART1 provides only two handshake signals: RTS and CTS. Figure 22 below shows the signal mapping of the RS-232 level signals to connector P1.
The phyCARD-M on the phyBASE Pin 2: TxD-RS232 Pin 7: RTS-RS232 Pin 3: RxD-RS232 Pin 8: CTS-RS232 Pin 5: Figure 22: UART1 connector P1 signal description The RS-232 interface is hard-wired and no jumpers must be configured for proper operation.
The phyCARD-M on the phyBASE 17.3.5 USB Host Connectivity (X7, X8, X9, X30, X33) X3 X2 X1 USB OTG AUDIO RS232 Ethernet Expansion 2 Expansion 1 ON / OFF BAT1 Reset MMC / SD card JP2 JP1 Figure 24: USB host interface at connector X7, X30, X33 The USB host interface of the phyCARD is accessible via the USB hub controller U4 on the Carrier Board.
The phyCARD-M on the phyBASE 17.3.6 USB OTG Connectivity (X29) X3 X2 X1 USB OTG AUDIO RS232 Ethernet Expansion 2 Expansion 1 ON / OFF BAT1 Reset MMC / SD card JP2 JP1 Figure 25: USB OTG interface at connector X29 The USB OTG interface of the phyCARD is accessible at connector X29 (USB Mini AB) on the Carrier Board.
The phyCARD-M on the phyBASE 17.3.7.1 Display Data Connector (X6) The display data connector at X6 (40 pin FCC connector 0,5mm pitch) combines various interface signals. Signal name Description number SPI 1 clock SPI1_SCLK SPI_MISO SPI 1 Master data in; slave data out SPI1_MOSI SPI 1 Master data out;...
The phyCARD-M on the phyBASE Caution: There is no protective circuitry for the backlight. Close jumper JP2 only if a 12 V power supply is connected to X28 as primary supply for the phyBASE. 17.3.7.3 Touch Screen Connectivity As many smaller applications need a touch screen as user interface, provisions are made to connect 4- or 5- wire resistive touch screens to the display data connector X6 (pins 34 - 38, refer to Table 36).
The phyCARD-M on the phyBASE 17.3.9 Audio Interface (X1,X2,X3) X3 X2 X1 USB OTG AUDIO RS232 Ethernet Expansion 2 Expansion 1 ON / OFF BAT1 Reset MMC / SD card JP2 JP1 Figure Audio interface at connectors X1,X2,X3 The AC97/HDA interface on the phyCARD connects to a Wolfson WM9712L (U1) or AD1986A (U17) audio codec controller on the Carrier Board.
The phyCARD-M on the phyBASE To avoid any conflicts when connecting external I C devices to the phyBASE the addresses of the on-board I C devices must be considered. Some of the addresses can be configured by jumper. Table 43 lists the addresses already in use. The table shows only the default address.
The phyCARD-M on the phyBASE 17.3.13 Expansion connectors (X8A, X9A) X3 X2 X1 USB OTG AUDIO RS232 Ethernet Expansion 2 Expansion 1 ON / OFF BAT1 Reset MMC / SD card JP2 JP1 Figure Expansion connector X8A, X9A The expansion connectors X8A and X9A provide an easy way to add other functions and features to the phyBASE.
The phyCARD-M on the phyBASE Pin # Signal Name Description VCC5V 5V power supply VCC5V 5V power supply VCC3V3 3,3V power supply VCC3V3 3,3V power supply Ground Ground I2C_SDA C Data I2C_SCL C Clock Ground Ground SPI_SS_SLOT0 X8A SPI chip select expansion port 0...
Flash device. Closing jumper JP1 results in start of the on-chip boot strap software of the i.MX35. Please refer to the phyCARD-M Quick Start Manual as well as the i.MX35 Reference Manual for Information on how to use the boot strap mode.
The phyCARD-M on the phyBASE 17.3.16 System Reset Button (S1) X3 X2 X1 USB OTG AUDIO RS232 Ethernet Expansion 2 Expansion 1 ON / OFF BAT1 Reset MMC / SD card JP2 JP1 Figure System Reset Button S1 The phyCARD Carrier Board is equipped with a system reset button at S1.
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