Sony HCD-FR1 Service Manual page 131

DMB08 BOARD IC901 uPD703033BYGF-M59-3BA-A (SYSTEM CONTROLLER)
Pin No. Pin Name
1 DAMP-DATA
2 DAMP-CLK
3 I2C-DATA
4 CQ-RST
5 I2C-CLK
6 DSP-DO
7 DIG-DI
8 DIG-CLK
9 EVDD
10 EVSS
11 P-PWM
12 DSP-RST
13 DSP-PM
14 DSP-CS
15 DSP-HACN
16 DSP-BST
17 DSP-GP9
18 DIR-ZERO
19 DIR-ERR
20 DIR-CE
21 VPP
22 DIR-XST
23 DIR-AD
24 DIR-XMODE
25 DIRDO
26 DAMP-RST
27 GP12
28 DAMP-MUTEN
29 CS1
30 CS2
31 CS3
32 DAC-CS
33 AD-RST
34 RESET
35 XT1
36 XT2
37 REGC
38 X2
39 X1
40 VSS
41 VDD
I/O
O Serial data output to the stream processors
O Serial data transfer clock signal output to the stream processors
Communication data bus with the DVD system processor and mechanism
I/O
controller
O Reset signal output to the DVD system processor "L": reset
Communication data reading clock signal input or transfer clock signal output
I/O
with the DVD system processor and mechanism controller
I Write data input from the audio digital signal processor
Read data output to the digital audio interface IC, audio digital signal processor
O
and D/A converter
Clock signal output to the digital audio interface IC, audio digital signal processor
O
and D/A converter
— Power supply terminal (+5V)
— Ground terminal
O PWM voltage control signal output
O Reset signal output to the audio digital signal processor "L": reset
O PLL reset signal output to the audio digital signal processor
O Chip select signal output to the audio digital signal processor
I Acknowledge signal input from to the audio digital signal processor
O Boot strap signal output to the audio digital signal processor
I Decode signal input from to the audio digital signal processor
I Audio serial data input from the digital audio interface IC
I PLL lock error and data error flag input from the digital audio interface IC
O Chip enable signal output to the digital audio interface IC
— Power supply terminal (for programming)
I Source clock switching monitor input from the digital audio interface IC
O Muting signal output
O System reset signal output to the digital audio interface IC "L": reset
I Write data input from the digital audio interface IC
O Reset signal output to the stream processors "L": reset
— Not used (fixed at "L")
O Muting on/off control signal output to the stream processors
O Chip select signal output to the stream processor (for front L-ch and R-ch)
O Chip select signal output to the stream processor (for center and woofer)
O Chip select signal output to the stream processor (for rear L-ch and R-ch)
O Chip select signal output to the D/A converter
O Reset signal output to the A/D converter and D/A converter
System reset signal input "L": reset
I For several hundreds msec. after the power supply rises, "L" is input, then it
changes to "H"
I Sub system clock input terminal
O Sub system clock output terminal
— Capacitance connection terminal
O Main system clock output terminal (20 MHz)
I Main system clock input terminal (20 MHz)
— Ground terminal
— Power supply terminal (+5V)
HCD-FR1/FR8/FR9
Description
Not used
Not used (open)
Not used (open)
"L": reset
"H": muting on
"L": reset
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