Cpu Configuration; Hardware Prefetcher; Adjacent Cache Line Prefetch; Max Cpuid Value Limit - DFI EL620-C User Manual

Table of Contents

Advertisement

3
BIOS Setup

CPU Configuration

This section is used to configure the CPU. It will also display detected CPU infor-
mation.
Configure advanced CPU settings
Module Version:3F.14
Manufacturer
Intel(R) Core(TM)2 Duo CPU
Frequency
FSB Speed
Cache L1
Cache L2
Ratio Actual Value:9

Hardware Prefetcher

Adjacent Cache Line Prefetch

Max CPUID Value Limit

Intel(R) Virtualization Tech
Execute-Disable Bit Capability
Core Multi-Processing
PECI
Hardware Prefetcher
Enables or disables the Hardware Prefetcher feature.
Adjacent Cache Line Prefetch
Enables or disables the Adjacent Cache Line Prefetch feature.
Max CPUID Value Limit
Set this field to Disabled when using Windows XP. Set this field to Enabled
when using legacy operating systems so that the system will boot even when
it doesn't support CPUs with extended CPUID function.
Intel(R) Virtualization Tech
When this field is set to Enabled, the VMM can utilize the additional hardware
capabilities provided by the Intel Virtualization technology. A full reset is re-
quired to change the setting.
Execute Disable Bit Capability
When this field is set to Disabled, it will force the XD feature flag to always
return to 0.
Core Multi-Processing
When this field is set to Disabled, it will disable one execution core of each
CPU die.
58
BIOS SETUP UTILITY
Advanced
: Intel
E8400 @ 3.00GHz
: 3.00GHz
: 1332MHz
: 64 KB
: 6144 KB
[Enabled]
[Enabled]
[Disabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
v02.61 (C)Copyright 1985-2006, American Megatrends, Inc.
For UP platforms,
leave it enabled.
For DP/MP servers,
it may use to tune
performance to the
specific application.
Select Screen
Select Item
↑↓
+ -
Change Option
F1
General Help
F10
Save and Exit
ESC
Exit

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents