Bu1 Board Schematic Diagram (4 Of 12) - Sony KDL-32SL130 Service Manual

BU1 BOARD SCHEMATIC DIAGRAM (4 OF 12)

1 | 2 | 3 | 4 | 5 |
A
•¡ SV P-PX P DDR & CPU I/F, POWE R & GND
—
B
—
R 4723
10k
1/16W
CHIP
5%
C SN74CBTLV3245APWR C 4781
TRIDENT_BUS 0 . 1
I C 4702
16V C 4779
1005 1
10V
NC VCC X7R
1608
AD0
A1 OE
—
AD1
A2 B1
AD2
A3 B2
AD7
A4 B3
D
AD5
A5 B4
AD3
A6 B5
100
AD4 R B 4702
A7 B6
—
AD6
A8 B7
GND B8
E
100
C 4780 R B 4703
SN74CBTLV3245APWR 0 . 1
I C 4701 16V
—
1005
NC VCC
GND
I C 4511 RD# OLD GND_D
A1 OE
74L V C1G04GW-125
WR#
A2 B1
F
NC VCC A3 B2
ALE_PX A
CS_PX A4 B3
GND Y
—
A5 B4
100
R B 4701
A6 B5
D3.3V
C 4701
0 . 1 R 4712
A7 B6 4 . 7 k
16V 1/16W
1005 CHIP
G 5%
A8 B7
INTN 1005
GND B8
— JL 4520
D3.3V EGPPCO
R 4522
R 4710
0
4 . 7 k
1/16W
CHIP
2 4
H RESET_TR
C 4702
FB 4701
0 . 1
16V
1 3 MA [11]
1005
REG5V
MA [10]
T R I-SDA
— C 4717 MA [9]
T R I -SC L 0 . 1
16V
MA [8]
1005
MA [7]
MA [6]
MA [5]
I
MA [4]
MA [3]
MA [2]
MA [1]
—
MA [0]
J
—
M A [0-11]
K
SV P-PX P
( 3 /4 )
—
DDR & CPU I/F
L
V ideo1
—
M
A_V 3_IN_V
V ideo3
B H 7641F H I /O list
—
A_REG5V_EMP
T V :
I N 1: V i deo1
A_REG5V_EMP
I N 2: V i deo3
N
I N 3: V i deo2
A_REG5V_EMP
I N 4:
A_V 2_IN_V
I N 5: A nal ogT uner
I N 6:
—
A_V 2_IN_Y
OUT1:
A_V 2_IN_S2SW
OUT 2: C -V ideo
V ideo2
OUT3: A_V 2_IN_C
O
A_V 2_IN_SSW
100
R B 4800
SDA_DEV ICE
I I C
SCL_DEV ICE
—
P
KDL-32SL130/40SL130
6 | 7 | 8 | 9 | 10 | 11 |
D3.3V
R 4512
VDDH VDDH
CHIP
D3.3V
0 0uH
FL 4701 C 4720 C 4739
TC7SH86FU(T5R SOY JF)
0. 001 0 . 1
I C 4703 EMI 50V 16V
X7R
L 4701 1005
G 1005 1005
H15
VDDH
C 4778 16V
E x cl usi v e 0 . 1 0 . 1
N15
16V C 4705 VDDH
OR 1005 P15
VDDH
GND
R 15
VDDH
T 13
VDDH
T 14
C 4746 C 4752 VDDH
C 4741 0. 001 0 . 1 VDDMQ
50V
10 16V T 15
10V X7R VDDH
1005
1005
E2
C 4708 C 4712 VDDR
0. 001
50V 2700p
50V E8
X7R VDDR
B
1005 1608 E4
VSSR
E7
PX_MLF1 VSSR
T3
PAVDD1
K 18 C13 MD[0] T2
AD_0 MD0 PAVSS1
C 4713
MD[1] 2700p
K 19 B13
AD_1 MD1 50V PX _PL F2
B
K 20 A13 MD[2] R 4721 T4
1608 0
AD_2 MD2 CHIP PAVDD2
MD[3]
J20 D12 0uH R3
AD_3 MD3 PAVSS2
FL 4706
MD[4]
J19 C11 V L 1_8
AD_4 MD4 1005 EMI
C 4740
J18 B11 MD[5] FB 4705 0. 001 R2
AD_5 MD5 0uH G AVDDAPLL
16V 50V
MD[6] X7R
J17 A11 C 4721 0 . 1 T1
AD_6 MD6 C 4726 AVSSAPLL
0. 001 1005
J16 A10 MD[7] 50V
X7R
AD_7 MD7
1005
B10 MD[8] U5
MD8 AVDD_ADC1
MD[9]
M20 C10 U7
ADDR0 MD9 AVDD_ADC2
V A1_8
L 20 D10 MD[10] T8
ADDR1 MD10 AVDD_ADC3
MD[11] C 4716 C 4725
L 19 D9 FB 4702 U6
ADDR2 MD11 0uH 0 . 1 220p AVDD_ADC4
16V 16V
MD[12] CH
L 18 A8
ADDR3 MD12 1005 1005
L 17 B8 MD[13] R 4722 T5
ADDR4 MD13 0 AVSS_ADC1
CHIP
MD[14]
L 16 C8 T7
ADDR5 MD14 AVSS_ADC2
K 16 D8 MD[15] T9
ADDR6 MD15 AVSS_ADC3
MD[16] D 3.3V -2
K 17 D7 0uH T6
ADDR7 MD16 AVSS_ADC4
FL 4705
MD[17]
C7
MD17 EMI
C 4814
H17 B7 MD[18] 0 . 0 1 FB 4703 C 4734 Y3
16V C 4718 G 0. 001
ALE MD18 0uH C 4722 0 . 1 AVDD3_ADC1
MD[19] X7R 50V
H18 A7 1005 0. 001 16V X7R U9
WR# MD19 50V AVDD3_ADC2
X7R
MD[20] 1005
H20 D6 1005 1005
RD# MD20
A5 MD[21] V3
AVDD3_BG_ASS
MD21
MD[22]
G18 B5 W3
INTN MD22 AVSS_BG_ASS
A4 MD[23]
MD23
MD[24]
H16 C5 U3
CPU_CS MD24 AVDD3_OUTBUF
MD[25]
A3 Y2
MD25 AVSS_OUTBUF
G16 A2 MD[26]
SDA MD26
MD[27]
JL 4521 G17 A1 C 4730 U1
SCL MD27 AVDDLLPLL
0. 001
MD[28] 50V
F18 C1 V1
PWM0 MD28 X7R AVSSLLPLL
F15 C2 MD[29] 1005
TESTMODE MD29
MD[30]
F17 C3 R5
RESET MD30 REGVCC
MD[31]
D3 P5
MD31 DGND
F16
V 5SF M D[0-31]
B2 DQS[3] C14
DQS3 VDD
F1 B6 DQS[2] C15
MA11 DQS2 VDD
F2 B9 DQS[1] D14
MA10 DQS1 VDD
DQS[0]
F3 B12 HDMI_33A D15
MA9 DQS0 VDD
F4 E 13
D QS [ 0-3]
MA8 VDD
G4 B1 DQM[3] D 3.3V -2 E 14
MA7 DQM3 VDD
0uH
DQM[2] FL 4707
G3 A6 E 15
MA6 DQM2 VDD
G2 A9 DQM[1] EMI F7
MA5 DQM1 C 4731 C 4750 VDD
FB 4706 0. 001
0 . 1 G 50V
G1 A12 DQM[0] 0uH 16V F8
MA4 DQM0 C 4723 X7R VDD
H1 0. 001 F13
DQM[0-3] 50V 1005 1005
MA3 VDD
X7R
H2 K3 1005 F14
MA2 BA0 BA0 VDD
H3 K4 G6
MA1 BA1 BA1 VDD
V D1_8
H4 G15
0uH
MA0 FL 4703 VDD
J 1 H6
CAS# CAS# EMI VDD
C 4736
0. 001
J 2 FB 4744 G J 5
RAS# RAS# 0uH C 4724 C 4732 50V VDD
X7R
K1 0. 001 0 . 1 K5
WE# WE# 50V 16V GND 1005 VDD
X7R 1005
K2 1005 N6
CLKE CKE VDD
P6
VDD
J 4 R6
CS0# CS# VDD
J 3 R7
CS1# VDD
R 4714
R8
22
1/16W VDD
D1 5% CHIP R 13
MCK0 MCLK0 VDD
E1 MCLK0# R 14
MCK0# R 4715 VDD
22 T 12
1/16W VDD
5% CHIP
E3
MVREF MVREF
M7
VSS
REG5V M8
VSS
M9
I C 4500 A_REG5V_EMP VSS
CXD9903GG L 4800 M10
22uH
VSS
M11
VSS
V ideoSW M12
C 4805 C 4806 VSS
0 . 1 16V
M13
25V 47
X7R VSS
1608 M14
VSS
N8
BH7641FV VSS
I C 4800 N9
VSS
A_V 1_IN_V
N10
V1 TV A_REG5V_EMP VSS
N11
R 4802
470 VSS
ADR VCC
1/16W N12
CHIP VSS
A_V 1_IN_Y
N13
Y1 COUT1 VSW_OUT_Y/CV VSS
P9
A_V 1_IN_S2SW VSS
S1 YOUT1
P10
R 4801 VSS
100 Q4800
A_V 1_IN_C ISA 1235A C1T P-1E F R 4805
1/16W 470 P11
C1 VOUT1 CHIP 1/16W VSS
5%
CHIP P12
VSS
A_V 1_IN_SSW
CSDET1 Y/VOUT2 VSW_OUT_C
V2 COUT2
JL 4801 R 4804 Q4801
100
ISA 1235A C1T P-1E F
1/16W I C 4500
BIAS VOUT3 CHIP CXD9903GG
C 4803 R 4813 C 4813 R 4814 5%
1 75 470 220k
1/10W
10V 10V 1/16W
X7R Y2 YOUT3 RN-CP CHIP
1608 5% 5% SV P-PX P
S2 COUT3
( 4 /4 )
C2 DCOUT
POWER/GROUND
CSDET2 V6 A_REG5V_EMP
C 4808
V3 GND 0 . 0 1
R 4808 100 25V
B
1/16W
1608
A nal og T u
TEST V5 TV_M_MON_V
Y3 CSDET4 A_REG5V_EMP
A_REG5V_EMP
S3 C4
C3 S4
A_REG5V_EMP
CSDET3 Y4
SCL AUXPORT
SDA V4 A_REG5V_EMP
GND
OLD GND_T
12 | 13 | 14 | 15 | 16 | 17
D1_IN_Y
D1_IN_CB
R 4506
D1_IN_CR 22
1/16W
R 4507 22
1/16W CHIP CHIP
D2_IN_Y
R 4508
D2_IN_CB 22
1/16W
CHIP
D2_IN_CR
R 4502
22
1/16W
VDDMQ CHIP
5% PC_G
PC_B
PC_R
PC_H
B4
VDDM
PC_V
C4
VDDM
D4
VDDM
VSW_OUT_Y /CV
D5
VDDM C 4758 C 4773
D11 0 . 1 0. 001
VDDM 16V 50V
X7R VSW_OUT_C
D13 1005
VDDM 1005
E5
VDDM JL 4714
C 4759
E6 0 . 1
VDDM 16V
E9
VDDM 1005
C 4774
E 10 0. 001
VDDM
50V
E 11 X7R
VDDM
1005
E 12
VDDM
F5
VDDM
F6
VDDM
G5
VDDM
H5 C 4500 C 4502 C 4503
0 . 1 0 . 1 C 4505
VDDM 0 . 1 0 . 1
16V 16V 16V 16V
1005
1005 1005 1005
B3
VSS
C6
VSS
GND
C9
VSS
OLD GND_D
C12
VSS
D2
VSS
L 5 D 3.3V -2
VSS
M4 28.322M Hz
AVCC
C 4762 C 4769
0 . 1
N4 0. 001
AVCC 16V 50V
N5 1005 X7R
AVCC GND 1005
GND
P4
AVCC
HDMI_33A
L 4
PVCC C 4760
0 . 1
16V
L 3 1005
GND
TDMS_GND
M3
TDMS_GND
N3
TDMS_GND VDDH EGP
P3
TDMS_GND
R1
TDMS_GND
EGPA0 W19 B14
DPA_0 TA1M
D18 C 4757 C 4765 EGPA1 V 18 A14
LVDS_VDDP 0 . 1 0. 001 R B 4500 DPA_1 TA1P
0
16V 50V EGPA3
C17 W18
LVDS_VDDO X7R DPA_2
1005 1005
D17 GND GND EGPA2 Y 18 B15
LVDS_VDDO DPA_3 TB1M
E 17 EGPA6 Y 17 A15
LVDS_VDDA DPA_4 TB1P
R B 4501 EGPA5
D16 W17
LVDS_VDDD 0 DPA_5
EGPA4 V 17 B16
DPA_6 TC1M
EGPA7
E 18 U17 A16
LVDS_VSSP DAP_7 TC1P
DT_C_DY 0
C18 U16
LVDS_VSSO DPA_8
C19 DT_C_DY 1 V 16 B18
LVDS_VSSO DPA_9 TD1M
R B 4502 DT_C_DY 2
E 16 W16 A18
LVDS_VSSA 22 DPA_10 TD1P
C16 DT_C_DY 3 Y 16
LVDS_VSSD DPA_11
DT_C_DY 4 W15 B19
DPA_12 TE1M
DT_C_DY 5
G9 V 15 A19
VSS DPA_13 22 TE1P
G10 DT_C_DY 6 U15 R B 4503
VSS DPA_14
DT_C_DY 7
G11 U14 B17
VSS DPA_15 TCLK1M
DT_C_DC3
G12 V 14 A17
VSS DPA_16 TCLK1P
H8 DT_C_DC0 W14
VSS DPA_17
DT_C_DC1
H9 R B 4504 Y 14 B20
VSS 22 DPA_18 TA2M
H10 DT_C_DC2 Y 13 A20
VSS DPA_19 TA2P
H11 DT_C_DC4 W13
VSS DPA_20
DT_C_DC5
H12 R B 4505 V 13 D19
VSS DPA_21 TB2M
22
H13 DT_C_DC6 U13 C20
VSS DPA_22 TB2P
DT_C_DC7
J 7 Y 12
VSS DPA_23
J 8 E 19
VSS JL 4713 TC2M
J 9 DT_C_DCLK Y 15 D20
VSS DPA_CLK TC2P
R 4521
DT_C_DHS 47 R 4536
J10 Y 19
VSS 22 DPA_HS
J11 DT_C_DVS R 4529 47 Y 20 G19
VSS DPA_VS TD2M
JL 4712
J12 F20
VSS R 4545 TD2P
4 . 7 k
J13 CHIP M18
VSS DP_HS
J14 M19 H19
VSS DP_VS TE2M
K7 MAIN_DIN G20
VSS 006: 6B TE2P
K8
VSS
K9 F19
VSS TCLK2M
K 10 E 20
VSS JL 4711 TCLK2P
K 11
VSS
K 12 EGPG2 M17
VSS DPB_0
K 13 EGPG3 M16
VSS DPB_1
K 14 EGPG4 N20
VSS DPB_2
L 7 EGPG5 N19
VSS DPB_3
EGPG6
L 8 N18
VSS DPB_4
L 9 EGPG7 N17
VSS
DPB_5
EGPG8
L 10 N16
VSS DPB_6
L 11 EGPG9 P16
VSS DPB_7
L 12 EGPB2 P17
VSS DPB_8
EGPB3
L 13 P18
VSS DPB_9
L 14 EGPB4 P19
VSS DPB_10
EGPB5 P20
DPB_11
EGPB6
R 19
DPB_12
EGPB7 R 18
DPB_13
EGPB8
R 17
DPB_14
EGPB9
R 16
DPB_15
EGPR2 T 16
DPB_16
EGPR3
T 17
DPB_17
EGPR4 T 18
DPB_18
EGPR5 T 19
DPB_19
EGPR6
T 20
DPB_20
EGPR7 U20
DPB_21
GND EGPR8
U19
DPB_22
EGPR9
U18
DPB_23
EGPPCO
EGPPCO
E GPPCI R 4547 33 R 20
DPB_CLK
EGPHSI R 4548 100 V 19
DPB_HS
1/16W 1/16W
V 20
V_BLK DPB_VS
5% 5%
EGPV SI
W20
DPB_DE
EGPHSO
R B 4511
0
I C 4500
CXD9903GG
SV P-PX P
( 1 /4 )
DIGIT A L IF
| 18 | 19 | 20 | 21 | 22 |
JL 4508 TMDS_RX0-
V6 M2
Y_G1 R X 0-
TO HDMI
JL 4509 W9 M1 TMDS_RX0+
PB_B1 RX0+
JL 4510
Y8
PB_R1
TMDS_RX1-
N2
R X 1-
W6 N1 TMDS_RX1+
Y_G2 RX1+
R 4505 C 4513 0 . 1 16V 1005
Y9
22 PB_B2
1/16W
CHIP C 4514 0 . 1 16V 1005 W8 P2 TMDS_RX2-
PR_R2 R X 2-
C 4515 0 . 1 16V 1005 P1 TMDS_RX2+
RX2+
Y6
Y_G3
C 4516 0 . 1 16V 1005 Y 10 L 2 TMDS_CLK -
PB_B3 RXC-
R 4501 C 4517 0 . 1 16V 1005 TMDS_CLK+
22 V8 L 1
PR_R3 RXC+
1/16W
CHIP C 4518 0 . 1 16V 1005
5%
C 4519
0 . 1 16V 1005 Y7 U11 DDC_SDA
PC_G DSDA
C 4520 DDC_SCL
0 . 1 16V 1005 W10 T 11
PC_B DSCL
C 4521 D 3.3V -2
1005 U8
0 . 1 16V PLUG_DET
PC_R
JL 4512
V 10 M5
AIN_HS ANTSTO
HDMI_I2S
U10
AIN_VS
R 4525 47 1/16W
T 10 R B 4512
PWR5V 10k
C 4506
0 . 1 16V 1005 Y4 R B 4510
CVBS1 100
W11
AUDIOCLK HDMI_MCLK
C 4507
0 . 1 16V 1005 V9 Y 11
C SCK
HDMI_SCK
U12
WS HDMI_WS
W2 V 12
CVBS_OUT1 SD0 HDMI_SDO
JL 4511
V2
CVBS_OUT2
JL 4513 R 4542
W12 10k
SPDIF CHIP
W5
V REFP_1
JL 4514
V5 V 11
VREFN_1 SCDT
W7
V REFP_2
V7
VREFN_2
JL 4515
U4
FB2
JL 4516
Y5
FB1
JL 4530
W4
FS2
JL 4531
V4
FS1
W1
XTALI
Y1
XTALO
R 4510
X 4500
0
CHIP
U2
MLF1
R4
R 4509
PL F2
1M
1/16W
CHIP
I C 4500
CXD9903GG
SV P-PX P
( 2 /4 )
HDMI
SI GN2338
TO PANEL
1 RA- 2
3 RA+
5 RB-
7 RB+
9 R C-
11 RC+
13 RCLK -
15 RCLK+
17 RD-
19 RD+
21 R E -
23 RE+
* R 4530 1k
ACC_OFF_ON
25 ACC_OFF_ON/HF_CONT
27 DCC_SEL0/SCL_BH
* R 4534 100
29 DCC_SEL1/SDA_BH
* R 4537100
31 DCC_L UT_SEL 0/3.3V /2.5V _AL ER T
* R 4516 100
33 DCC_L UT_SE L 1/C1.5/P1.5_AL E R T
* R 4532
100 R 4550 100
35 DCC_LUT_SEL2/HF_CONT2
GND
37 1005
GND
39 GND
CN4500
40P
DCC_LUT_SEL1/HF_CONT
DCC_SE L 1/3.3V /2.5V _A L E R T
DCC_L UT _SE L 0/C1.5V /P1.5V _A L E R T
DCC_LUT_SEL2/HF_CONT2
B U1 4/12
T R IDE NT
KDL-32SL130/40SL130
23 | 24 |
GND
GND
GND 4
GND 6
GND 8
GND 10
GND 12
GND 14
GND 16
GND 18
GND 20
GND 22
GND 24
12V 26
12V 28
12V 30
12V 32
12V 34
12V 36
12V 38
12V 40
C 4531 FB 4501
0. 001
50V 0uH
X7R
1005
C 4530
0. 001
50V
X7R
1005
GND
OLD GND_D
A -1273-105-B <W A X 3>B U 1-P4
66