JVC KD-SH99 Service Manual page 36

KD-SH99
QQ
3 7 63 1515 0
LC75878W (IC501) : LCD driver
1. Pin layout
1
~
25
2. Block diagram
GENERAL
PORT
CLOCK
OSC
GENERATOR
VLCD
CONTRAST
ADJUSTER
TE
L 13942296513
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VDD
VSS
3. Pin function
No. Symbol
1~73 SEG1~SEG73
74 SEG74
75 SEG75
76~83
COM8~COM1
84~87 P1~P4
88 VDD
89
VLCD
90 VLCD0
91 VLCD1
92 VLCD2
93 VLCD3
www
94 VLCD4
95 VSS
96
OSC
97 LCD RESET
98 CE
99
CL
100 DI
1-36
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100 ~ 76
75
~
51
26 ~ 50
COMMON
DRIVER
I/O
O Segment driver output pin.
O Segment driver output pin.
O Segment driver output pin.
O Common driver output pin.
O General-purpose output pin.
- Logic block power supply pin.
-
LCD driver power supply pin.
O LCD driver bias 4/4 voltage (H-level) power pin.
I LCD driver bias 3/4 voltage (intermediate level) power pin.
I LCD driver bias 2/4 voltage (intermediate level) power pin.
I LCD driver bias 1/4 voltage (intermediate level) power pin.
I LCD driver bias 0/4 voltage (L-level) power pin.
- Power supply pin to connect to ground.
x ao
I/O Oscillator pin. y
I Display off, general-purpose output port L fixed input pin.
. i
I Chip enable
I
Synchronization clock
I Transfer data
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8
SEGMENT DRIVER & LATCH
CONTROL
REGISTER
SHIFT REGISTER
Q Q
3 6 7 1 3
CCB
INTERFACE
Function
u163
.
2 9 9 4 2 8
1 5 0 5 8 2 9 9 4
m
co
9 9
2 8 9 9