V5R2 Additions (February, May, July 2003); Iseries Model 8Xx Servers - IBM 170 Servers Manual

Intel power systems operating systems
Hide thumbs Also See for 170 Servers:
Table of Contents

Advertisement

8. The 64-way is measured as two 32-way partitions since i5/OS does not support a 64-way
partition.
9. IBM stopped publishing CIW ratings for iSeries after V5R2. It is recommended that
the IBM Systems Workload Estimator be used for sizing guidance, available at:
http://www.ibm.com/eserver/iseries/support/estimator
C.8 V5R2 Additions (February, May, July 2003)
New for this release is a product line refresh of the iSeries hardware which simplifies the model structure
and minimizes the number of interactive choices. In most cases, the customer must choose between a
Standard edition which includes a 5250 interactive CPW value of 0, or an Enterprise edition which
supports the maximum 5250 OLTP capacity. The table in the following section lists the entire product
line for 2003.
C.8.1 iSeries Model 8xx Servers
Table C.8.1.1. iSeries Models 8xx Servers
Chip Speed
Model
890-2498 (7427)
890-2498 (7425)
890-2497 (7424)
890-2497 (7422)
870-2486 (7421)
870-2486 (7419)
870-2489 (7431)
870-2489 (7433)
825-2473 (7418)
825-2473 (7416)
810-2469 (7430)
810-2469 (7428)
810-2467 (7412)
810-2467 (7410)
810-2466 (7409)
810-2466 (7407)
810-2465 (7406)
810-2465 (7404)
800-2464 (7408)
800-2463 (7400)
*Note: 1. 5250 OLTP CPW - Max (maximum CPW value). There is no limit on 5250 OLTP workloads
and the full capacity of the server (Processor CPW) is available for 5250 OLTP work.
2. 1.41MB - These models share L2 cache between 2 processors
3. IBM does not intend to publish CIW ratings for iSeries after V5R2. It is recommended that
the eServer Workload Estimator be used for sizing guidance, available at:
http://www.ibm.com/eserver/iseries/support/estimator
IBM i 6.1 Performance Capabilities Reference - January/April/October 2008
©
Copyright IBM Corp. 2008
L2 cache
CPU
MHz
per CPU
Range
1300
1.41 MB*
24 - 32
1300
1.41 MB*
24 - 32
1300
1.41 MB*
16 - 24
1300
1.41 MB*
16 - 24
1300
1.41 MB*
8 - 16
1300
1.41 MB*
8 - 16
1300
1.41 MB*
5 - 8
1300
1.41 MB*
5 - 8
1100
1.41 MB*
3 - 6
1100
1.41 MB*
3 - 6
4 MB
750
4 MB
750
4 MB
750
750
4 MB
2 MB
540
2 MB
540
2 MB
540
2 MB
540
540
2 MB
540
0 MB
Appendix C CPW, CIW and MCU for System i Platform
5250 OLTP
Processor CPW
CPW*
29300-37400
Max
29300-37400
20000-29300
Max
20000-29300
11500-20000
Max
11500-20000
7700-11500
7700-11500
Max
3600-6600
Max
3600-6600
2
2700
Max
2
2700
1
1470
Max
1
1470
1
1020
Max
1
1020
1
750
Max
1
750
1
950
1
300
Processor
CIW*
12900-16700
84100-108900
0
12900-16700
84100-108900
8840-12900
57600-84100
0
8840-12900
57600-84100
5280-9100
29600-57600
0
5280-9100
29600-57600
0
3600-5280
20200-29600
3600-5280
20200-29600
1570-2890
8700-17400
0
1570-2890
8700-17400
950
0
950
530
0
530
380
0
380
250
0
250
50
350
25
-
MCU
7900
7900
4200
4200
3100
3100
1900
1900
2900
-
352

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

7xx serversAs/400 risc server

Table of Contents