Analog Input Calibration; External Clock Input - Measurement Computing LGR-5320 Series User Manual

LGR-5320 Series User's Guide
When connecting differential inputs to floating voltage sources in the ±10 V, ±5 V, ±1 V ranges, the
Note 3:
user must provide a DC return path from the low channel (CHxL) connector of each differential input
to ground. To do this, simply connect a resistor from the CHxL connector of the differential inputs to
AGND. A value of approximately 100 kΩ can be used for most applications.
The ±30 V input range on the LGR-5327/5329 incorporates an input resistor attenuator network, which
eliminates the need for external bias return compensation resistors.
Note 4: The LGR-5325 AGND and GND pins are tied together internally. These grounds are electrically
isolated from the EGND (earth ground) pin.
The LGR-5327 AGND, GND and ENC- pins are tied together internally. These grounds are
electrically isolated from the EGND (earth ground) pin.
The LGR-5329 AGND, GND and ENC– pins are tied together internally. These grounds are
electrically isolated from the EGND (earth ground) and the IGND (isolated ground) pins.

Analog input calibration

Parameter
Calibration method
Calibration interval

External clock input

Parameter
External clock I/O
Input high voltage
Input low voltage
Output high voltage
Output low voltage
Pacer rate
Minimum pulse width
Table 2. Analog input calibration specifications
Specifications
Factory calibration
1 year
Table 3. External clock I/O specifications
Condition
IOH = –8 mA
IOL = 8 mA
30
Specification
PACER (pin 75), software-selectable as input or
output
2.2 V max
0.6 V min
3.8 V min
0.4 V max
LGR-5325: 100 kHz max
LGR-5327/5329:200 kHz max
2.5 us min
Specifications