IBM EM78P809N Specification page 66

EM78P809N
8-Bit Microcontroller
Binary Instruction
0 0000 0000 0000
0 0000 0000 0001
0 0000 0000 0010
0 0000 0000 0011
0 0000 0000 0100
0 0000 0000 rrrr
0 0000 0001 0000
0 0000 0001 0001
0 0000 0001 0010
0 0000 0001 0011
0 0000 0001 0100
0 0000 0001 rrrr
0 0000 01rr rrrr
0 0000 1000 0000
0 0000 11rr rrrr
0 0001 00rr rrrr
0 0001 01rr rrrr
0 0001 10rr rrrr
0 0001 11rr rrrr
0 0010 00rr rrrr
0 0010 01rr rrrr
0 0010 10rr rrrr
0 0010 11rr rrrr
0 0011 00rr rrrr
0 0011 01rr rrrr
0 0011 10rr rrrr
0 0011 11rr rrrr
0 0100 00rr rrrr
0 0100 01rr rrrr
0 0100 10rr rrrr
0 0100 11rr rrrr
0 0101 00rr rrrr
0 0101 01rr rrrr
0 0101 10rr rrrr
0 0101 11rr rrrr
0 0110 00rr rrrr
0 0110 01rr rrrr
0 0110 10rr rrrr
0 0110 11rr rrrr
0 0111 00rr rrrr
0 0111 01rr rrrr
0 0111 10rr rrrr
0 0111 11rr rrrr
0 100b bbrr rrrr
0 101b bbrr rrrr
0 110b bbrr rrrr
0 111b bbrr rrrr
1 00kk kkkk kkkk
1 01kk kkkk kkkk
62 •
Hex Mnemonic
0000 NOP
0001 DAA
0002 CONTW
0003 SLEP
0004 WDTC
000r IOW R
0010 ENI
0011 DISI
0012 RET
0013 RETI
0014 CONTR
001r IOR R
00rr MOV R,
0080 CLRA
00rr CLR R
01rr SUB A,
01rr SUB R,
01rr DECA R
01rr DEC R
02rr OR A,
02rr OR R,
02rr AND A,
02rr AND R,
03rr XOR A,
03rr XOR R,
03rr ADD A,
03rr ADD R,
04rr MOV
A,
04rr MOV R,
04rr COMA R
04rr COM R
05rr INCA R
05rr INC R
05rr DJZA
R
05rr DJZ R
06rr RRCA R
06rr RRC R
06rr RLCA R
06rr RLC R
07rr SWAPA R
07rr SWAP R
07rr JZA R
07rr JZ R
0xxx BC R,
0xxx BS R,
0xxx JBC R,
0xxx JBS R,
1kkk CALL k
1kkk JMP k
(This specification is subject to change without further notice)
Operation
No Operation
Decimal Adjust A
A → CONT
0 → WDT, Stop oscillator
0 → WDT
A → IOCR
Enable Interrupt
Disable Interrupt
[Top of Stack] → PC
[Top of Stack] → PC,
Enable Interrupt
CONT → A
IOCR → A
A A → R
0 → A
0 → R
R R-A → A
A R-A → R
R-1 → A
R-1 → R
A ∨ R → A
R
A A ∨ R → R
A & R → A
R
A A & R → R
R A ⊕ R → A
A A ⊕ R → R
A + R → A
R
A + R → R
A
R → A
R
R → R
R
/R → A
/R → R
R+1 → A
R+1 → R
R-1 → A, skip if zero
R-1 → R, skip if zero
R(n) → A(n-1),
R(0) → C, C → A(7)
R(n) → R(n-1),
R(0) → C, C → R(7)
R(n) → A(n+1),
R(7) → C, C → A(0)
R(n) → R(n+1),
R(7) → (C), C → (R(0)
R(0-3) → ( A(4-7),
R(4-7) → ( A(0-3)
R(0-3) → ( R(4-7)
R+1 → A, skip if zero
R+1 → R, skip if zero
b 0 → ( R(b)
b 1 → ( R(b)
b if R(b)=0, skip
b if R(b)=1, skip
PC+1 → [SP],
(Page, k) → (PC)
(Page, k) → (PC)
Product Specification (V1.0) 07.26.2005
Status Affected
None
C
None
T,P
T,P
None <Note1>
None
None
None
None
None
None <Note1>
None
Z
Z
Z,C,DC
Z,C,DC
Z
Z
Z
Z
Z
Z
Z
Z
Z,C,DC
Z,C,DC
Z
Z
Z
Z
Z
Z
None
None
C
C
C
C
None
None
None
None
None
None
None
None
None
None