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The detected voltage is also applied to the noise blanker
AGC circuit (Q12, Q10) and is then fed back to the noise
amplifier (IC8) as a bias voltage. The noise blanker AGC cir-
cuit prevents closure of the noise blanker gate for long peri-
ods by non-pulse-type noise. The time constant of the noise
blanker AGC circuit is determined by R58 and C114.
3-1-5 DEMODULATOR CIRCUIT (MAN UNIT)
This circuit mixes the 2nd IF and BFO signals to pick up the
AF components (except H3E mode). The 2nd IF signal from
the 2nd IF amplifier (Q33) is applied to the balanced mixer
(IC10, pin 1). The 9.0116–9.013 MHz BFO signal from the
PLL unit is also applied to IC10 (pin 10). AF signals are out-
put from pin 6 and are then applied to the AF circuits.
3-1-6 H3E DETECTOR CIRCUIT (MAIN UNIT)
The 2nd IF signal from the 2nd IF amplifier (Q33) is applied
to the AM detector circuit (D39) to be demodulated into AF
signals. The detected signals are amplified at the buffer
amplifier (Q45) and then applied to the AF circuits.
3-1-7 AGC CIRCUIT (MAIN UNIT)
The AGC (Automatic Gain Control) circuit reduces IF ampli-
fier gain to prevent the receiver circuit from distorting and to
keep the audio output at a constant level.
A portion of the IF signals from the 2nd IF amplifier (Q33) is
detected at the AGC detector circuit (D31) and is then
applied to the AGC amplifier (Q41) to control the AGC time
constant line. The reference voltage of the AGC line is con-
trolled by the "RFG" line which comes from the CPU for the
RF gain setting.
When receiving a strong signal, the detected voltage
increases and the voltage of the AGC line is decreased by
the AGC amplifier (Q41) via the –5 V voltage line. The AGC
line is used for the bias voltage of the IF amplifiers (Q8, Q16,
Q32, Q33), so that these amplifiers reduce gain.
When the strong signal disappears, the AGC line voltage is
released by C245/R268 and C670/R813.
• AGC circuit
1st IF signal
Q8
8 V
CW, SCAN
AGC time
constant line
RFG (RF gain control)
0 to 5 V
–5 V
Q16
D52
AGC-fast control
Q131
+
D37
R812
R266
R265
The AGC switch (Q42, D38) turns the AGC circuit OFF when
the AGC OFF function activates. The AGC-fast switch
(Q131) sets the AGC line as fast-release during scanning
and A1A mode selection.
3-1-8 S-METER CIRCUIT (MAIN UNIT)
The S-meter indicates the AGC level on the display, since
the AGC level varies with the received signal strength.
The AGC bias voltage (AGC time constant line) from the
AGC amplifier (Q41) is inverted and amplified at the meter
amplifier (IC19b). The amplified signal is applied to the CPU
via the "RSM" line.
3-1-9 AF AMPLIFIER CIRCUITS
(MAIN UNIT AND LOGIC BOARD)
AF signals from the demodulator or H3E detector circuits
pass through the active low-pass filter (IC20b) and squelch
gate (IC12a), and are then divided into the AF amplifier cir-
cuit and AF activated squelch circuit. The divided AF signals
are applied to the CTRL2 board via the buffer amplifier
(IC42).
The AF signals are converted into PWM signal at the PWM
modulation circuit (IC4, Q11) via the AF amplifier (CTRL2
board; IC5), and are applied to the serial interface IC (IC1).
The serial interface IC outputs PWM signal to the CTRL1
board (RC-21) via a coaxial cable.
The PWM signal from the IC-M710RT is applied to the
LOGIC board after being converted into an analog signal by
passing though the serial interface IC (IC1) on the CTRL1
board.
The AF signals are applied to the electronic volume control
(LOGIC board; IC9). The CPU (pin 39) outputs the volume
control signal (1 to 5 V) according to the [VOLUME] control
setting.
The AF output signals from IC9 (pin 5) are amplified at the
AF power amplifier (IC8) and then applied to the internal
speaker via the microphone connector (pins 3 and 4).
The speaker switch relay (RL1) is connected to the (–) ter-
minal of the internal speaker for the [SPEAKER] switch func-
tion.
2nd IF filters
Q32
R813
R268
+
+
C670
C245
Q41
AGC amplifier
R264
3 - 2
H3E detector
Q33
Demodulator
D31
AGC detector
R269
AGC OFF control
Q42
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