Processor; Memory; Pci Riser Slots; Video - MAXDATA PLATINUM User Manual All Efforts Have Been Made To Offer A

Processor

The MAXDATA PLATINUM Server Board accommodates one or two Intel
sors with 512 k cache in the INT3/FCPGA Socket 604 package. This processor uses the .13
micron technology.

Memory

The system board has six 168-pin DIMM slots each supporting 72-bit ECC registered DDR
DIMMs (DDR 200 or DDR 266 compatible). Memory is partitioned in three banks. You may
install a minimum of 256 MB (128 MB x 2) and as much as 12 GB. Memory must be installed
in pairs, starting with bank 1 (slots 1B and 1A).
The controller automatically detects, sizes, and initializes the memory array, depending on
the type, size, and speed of the installed DIMMs, and reports memory size and allocation
to the server via configuration registers.

PCI Riser Slots

The server board has two PCI riser slots. Riser slot B provides the following features:
• 184-pin, 5 volt keyed, 64-bit expansion slot connector
• Support for either a 1-slot or a 3-slot PCI riser card
• Support for both full size and low profile PCI cards
Riser C provides the following features:
• 184-pin, 5 volt keyed, 64-bit expansion slot connector
• Support for either a 1-slot or a 3-slot PCI riser card
• Support for only low profile PCI cards
• Radios Enabled for use with zero channel RAID cards (SCSI version only)

Video

The MAXDATA PLATINUM Server Board uses an ATI RAGE XL PCI graphics accelerator
with 8 MB of video SDRAM. The embedded SVGA video subsystem supports:
• Resolutions up to 1600 x 1200 under 2D and 1024 x 768 under 3D
• CRT and LCD monitors up to 100 Hz vertical refresh rate
The server board supports disabling of the onboard video through the BIOS setup menu or
when a plug in video card is installed in any of the PCI slots.

SCSI Controller

The SCSI version of the server board includes an embedded Adaptec AIC-7902W controller
providing dual Ultra 320 Low Voltage Differential (LVD) SCSI channels.
The SCSI bus is terminated on the server board with active terminators that cannot be
disabled. The onboard device must always be at one end of the bus. The device at the other
end of the cable must also be terminated. LVD devices generally do not have termination
built-in and need to have a termination source provided. Non-LVDs devices generally are
terminated through a jumper or resistor pack on the device itself.
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Xeon™ proces-
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Description