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Intel SE7221BK1-E Technical Product Specification

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Intel
Server Board
SE7221BK1-E
Technical Product Specification
Intel order number C91860-001
Revision 1.3
February 2005
Enterprise Platforms and Services Marketing

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Summary of Contents for Intel SE7221BK1-E

  • Page 1 ® Intel Server Board SE7221BK1-E Technical Product Specification Intel order number C91860-001 Revision 1.3 February 2005 Enterprise Platforms and Services Marketing...
  • Page 2 Added Diagnostic LED codes to error handling and reporting section February 2005 Modified Diagnostic LED section. Correct supported CPU matrix. This product specification applies to the Intel® Server Board SE7221BK1-E with BIOS identifier SE7221BK10.86B. Changes to this specification will be published in the Intel® Server Board SE7221BK1-E Specification Update before being incorporated into a revision of this document.
  • Page 3 It is the responsibility of the system integrator that chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of airflow required for their specific application and environmental conditions.

  • Page 4: Table Of Contents

    SE7221BK1-E Technical Product Specification Table of contents 1. Introduction .......................... 1 2. Server Board Overview ......................2 SE7221BK1-E Feature Set..................2 3. Functional Architecture ....................... 5 Processor Subsystem....................5 3.1.1 Processor VRD ......................5 3.1.2 Reset Configuration Logic ..................5 3.1.3...
  • Page 5 SE7221BK1-E Technical Product Specification PCI Error Handling....................19 6. ACPI Implementation ......................23 ACPI ........................23 6.1.1 Front Panel Switches..................... 23 6.1.2 Wake up Sources (ACPI and Legacy) ..............24 7. Connectors ......................... 25 Main Power Connector ..................25 C Header ......................26 Front Panel Connector...................
  • Page 6 Table 76. Boot Block POST Progress Codes ................. 64 Table 77. POST Progress Codes ..................... 65 10. Power Information......................68 10.1 Intel® Server Board SE7221BK1-E Power Budget ..........68 10.2 Power Supply Specifications ................. 69 10.2.1 Power Timing Requirements ................. 69 10.2.2...
  • Page 7 SE7221BK1-E Technical Product Specification 13.1.2 Product EMC Compliance ..................76 13.1.3 Product Regulatory Compliance Markings ............76 13.2 Electromagnetic Compatibility Notices ..............77 13.2.1 FCC (USA)......................77 13.2.2 INDUSTRY CANADA (ICES-003)................78 13.2.3 Europe (CE Declaration of Conformity) ..............78 13.2.4...
  • Page 8 SE7221BK1-E Technical Product Specification List of Tables Table 1. Processor Support Matrix ....................6 Table 2. Memory Bank Labels and DIMM Population Order............8 Table 3. Characteristics of Dual/Single Channel Configuration with/without Dynamic Mode ..9 Table 4. Supported DDR2 modules ................... 10 Table 5.
  • Page 9 SE7221BK1-E Technical Product Specification Table 33. Three-pin Fan Headers Pin-out (JP5J1, JP5J2, JP7A1, JP6A1)....... 31 Table 34. Eight-pin Fan Header Pin-out (J6J1, J6J2, J6J3, and J6J4)........32 Table 35. Intrusion Cable Connector (J1A1)Pin-Out ..............32 Table 36. HDD LED Header (J1E1) Pin-Out................32 Table 37.
  • Page 10 SE7221BK1-E Technical Product Specification Table 68. BIOS Recovery Beep Codes ..................57 Table 69. POST Error Messages and Handling................. 57 Table 70. POST Code Checkpoints.................... 58 Table 71. Bootblock Initialization Code Checkpoints ..............61 Table 72. Bootblock Recovery Code Checkpoints..............62 Table 73.
  • Page 11 SE7221BK1-E Technical Product Specification List of Figures Figure 1. Intel® Server Board SE7221BK1-E Diagram .............. 4 Figure 2. Memory Bank Label Definition..................8 Figure 3. Interrupt Routing Diagram ..................20 Figure 4. ICH6R Interrupt Routing Diagram................21 Figure 5. PXH Interrupt Routing Diagram .................. 22 Figure 6.

  • Page 13: Introduction

    SE7221BK1-E Technical Product Specification Introduction This Intel® Server Board SE7221BK1-E Technical Product Specification (TPS) provides a high- ® level technical description for the Intel Server Board SE7221BK1-E. It details the architecture and feature set for all functional sub-systems that make up the server board.

  • Page 14: Server Board Overview

    The Intel® Server Board SE7221BK1-E supports the following feature set: Processor and Front Side Bus (FSB) support - Supports single Intel® Pentium® 4 and Celeron® processors in an LGA775 package - Capable of 800 MT/s on system bus - Supports Hyper-Threading Technology - Supports Intel®...
  • Page 15 SE7221BK1-E Technical Product Specification USB 2.0 Two external Universal Serial Bus (USB) ports with an additional internal header providing two optional USB ports for front panel support. -Supports wake-up from sleeping states S1-S4 -Supports legacy Keyboard/Mouse connections when using PS2-USB dongle...

  • Page 16: Figure 1. Intel® Server Board Se7221Bk1-E Diagram

    SE7221BK1-E Technical Product Specification Socket Q P O TP01326 Figure 1. Intel® Server Board SE7221BK1-E Diagram A Chassis Intrusion Header L DIMM Sockets (two – from left to 34-pin Front Panel Connector right: DIMM 1B, DIMM 2B) B PCI Slot M DIMM Sockets (two –...

  • Page 17: Functional Architecture

    The Intel® Server Board SE7221BK1-E has a VRD (Voltage Regulator Down) to support one processor. It is compliant with the VRM 10.1 DC-DC Converter Design Guide Line and provides a maximum of 120A, which is capable of supporting the requirements for Intel® Pentium® 4 and Intel® Celeron® D processors.

  • Page 18: Interrupts And Apic

    533MHz Note: The Pentium® 4 Processor Extreme Edition IS NOT supported for use with the Intel® Server Board SE7221BK1-E.The board is designed to provide up to 120A of processor current. Processors with higher current requirements are not supported. For a complete list of all supported processors, please visit the Intel®...
  • Page 19 3200 MB. THIS IS ONLY AN ISSUE WHEN 4 GB OF MEMORY IS USED. A memory configuration of less than 4 GB will not be susceptible to this issue. Please refer to Intel® Technical Advisory TA 719-01 on the support web site located at http://support.intel.com/support/motherboards/server/SE7221BK1E.

  • Page 20: Table 2. Memory Bank Labels And Dimm Population Order

    SE7221BK1-E Technical Product Specification Table 2. Memory Bank Labels and DIMM Population Order Location DIMM Label Channel Population Order J8J1 (DIMM_1A) J8J2 (DIMM_2A) J9J2 (DIMM_1B) J9J1 (DIMM_2B) J8J2 J9J2 J9J1 J8J1 DIMM_1A DIMM_2A DIMM_1B DIMM_2B Channel B Channel A (Bank 2) (Bank 1) Figure 2.

  • Page 21: The Intel E7221 Chipset

    The Intel E7221 Chipset The Intel® Server Board SE7221BK1-E is designed around the Intel® E7221 chipset. The chipset provides an integrated I/O bridge and memory controller, and a flexible I/O subsystem core (PCI Express*). The chipset consists of three primary components: GMCH: Graphics Memory Control Hub.

  • Page 22: Gmch Memory Architecture Overview

    The GMCH is a 1210-ball FC-BGA device and uses the proven components of previous generations like the Intel® Pentium® 4 processor bus interface unit, the hub interface unit, and the DDR2 memory interface unit. In addition, the GMCH incorporates an integrated high performance graphics media accelerator and a PCI Express* interface.

  • Page 23: Ich6R

    Other features provided by the GMCH include the following: Full support of ECC on the processor bus Full support of Intel® x4 SDDC on the memory interface with x4 DIMMs Twelve deep in-order queue, two deep defer queue Full support of un-buffered DDR2 ECC DIMMs.
  • Page 24 The ICH6R contains one EHCI USB 2.0 controller and four USB ports. The USB controller moves data between main memory and up to four USB connectors. All ports function identically and with the same bandwidth. The Intel® Server Board SE7221BK1-E implements four ports on the board.

  • Page 25: Super I/O

    SE7221BK1-E Technical Product Specification Super I/O National Semiconductor* PC87427Super IO device contains all of the necessary circuitry to control two serial ports, one parallel port, floppy disk, PS/2-compatible keyboard and mouse and hardware monitor controller. The baseboard implements the following features:...

  • Page 26: Bios Flash

    I/O Subsystem PCI Subsystem The primary I/O buses for the SE7221BK1-E are 3 independent PCI bus segments (4 independent segments with SE7221BK1LX sku) with PCI, PCI-E and two PCI-X buses. The PCI buses comply with the PCI Local Bus Specification, Rev 2.3. The P32-A bus segment is directed through the ICH6R.

  • Page 27: P32-B 66-Mhz Pci-X Subsystem (Se7221Bk1Lx Sku Only)

    5.1.2 P32-B 66-MHz PCI-X Subsystem (SE7221BK1LX sku only) One 32-bit PCI bus segment is directed through the PXH interface A. This PCI segment, P32-B, just has an embedded device, Intel® 82541PI LAN (NIC2) clocked at 66MHz. (SE7221BK1LX sku only) 5.1.2.1...

  • Page 28: P64-C 66/100-Mhz Pci-X Subsystem

    SE7221BK1-E Technical Product Specification and GNTx* are a special case in that they are internal to the host bridge. The following table defines the arbitration connections. Table 9. P32-B Arbitration Connections Baseboard Signals Device PCIX REQ_N0/GNT_N0 Intel® 82541PI LAN (NIC2) 5.1.3...

  • Page 29: Pci-E X8

    (82541PI controller) network interfaces. One is through ICH6R directly, and another one is through PXH (SE7221BK1LX sku only). The Intel® 82541PI Gigabit Ethernet is a single, compact component with an integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) functions. For desktop, workstation and mobile PC Network designs with critical space constraints, the Intel®...

  • Page 30: Interrupt Routing

    For APIC mode, the baseboard interrupt architecture incorporates three Intel I/O APIC devices to manage and broadcast interrupts to local APICs in each processor. The Intel® I/O APICs monitor each interrupt on each PCI device; including PCI slots in addition to the ISA compatibility interrupts IRQ (0-15).

  • Page 31: Serialized Irq Support

    5.4.3 Serialized IRQ Support The SE7221BK1-E server board supports a serialized interrupt delivery mechanism. Serialized Interrupt Requests (SERIRQ) consists of a start frame, a minimum of 17 IRQ / data channels, and a stop frame. Any slave device in the quiet mode may initiate the start frame. While in the continuous mode, the start frame is initiated by the host controller.

  • Page 32: Figure 3. Interrupt Routing Diagram

    SE7221BK1-E Technical Product Specification ICH6 IOAPIC 0 DMI INTERFACE IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 ICH6 IRQ10 ICH6 IRQ11 8259PIC IRQ12 IRQ13 IRQ14 IRQ15 IRQ16 IRQ17 IRQ18 IRQ19 IRQ20 IRQ21 IRQ22 IRQ23 X8 PCI-E interface INTR...

  • Page 33: Figure 4. Ich6R Interrupt Routing Diagram

    SE7221BK1-E Technical Product Specification Super I/O Timer Keyboard Cascade Serial Port2/ISA SERIRQ SERIRQ Serial Port1/ISA Floppy/ISA SCI/ISA Mouse/ISA Coprocessor Error P IDE/ISA Not Used PIRQA# PIRQB# PIRQC# INTEL 82541PI(NIC1) PIRQD# Slot 1 INTC PIRQE# Slot 1 INTA PIRQF# PIRQG# Slot 1 INTB...

  • Page 34: Figure 5. Pxh Interrupt Routing Diagram

    SE7221BK1-E Technical Product Specification PA IRQ0 PA IRQ1 PA IRQ2 PA IRQ3 INTEL 82541PI(NIC2) PA IRQ4 PA IRQ5 PA IRQ6 PCI-X PA IRQ7 Interface PA IRQ8 PA IRQ9 PA IRQ10 PA IRQ11 PA IRQ12 PA IRQ13 PA IRQ14 PA IRQ15...

  • Page 35: Acpi Implementation

    ACPI mode. The BIOS responds to enable ACPI mode. The system automatically returns to legacy mode upon hard reset or power-on reset. The SE7221BK1-E platform supports S0, S1, S4, and S5 states. When the system is operating in ACPI mode, the OS retains control of the system and OS policy determines the entry...

  • Page 36: Wake Up Sources (Acpi And Legacy)

    SE7221BK1-E Technical Product Specification supply through an inverter, and then transition to an ON state. The ICH6 is configured to generate an SMI due to a power button Power Button On to Off event. The BIOS services this SMI and sets the state of the (Legacy): machine in the ICH6 and Super IO to the OFF state.

  • Page 37: Connectors

    SE7221BK1-E Technical Product Specification Connectors Main Power Connector The main power supply connection is obtained using the 24-pin connector. The following table defines the pin-outs of the connector. Table 16. Power Connector Pin-out (CN4H1) Signal 18 AWG Color Signal 18 AWG Color +3.3VDC...

  • Page 38: I 2 C Header

    SE7221BK1-E Technical Product Specification C Header Table 18. HSBP Header Pin-out (J1D1) Signal Name Description HR_SMB_5V_DAT Data Line GROUND HR_SMB_5V_CLK Clock Line GROUND Table 19. LCD Header Pin-out (J1C1) Signal Name Description HR_SMB_5V_DAT Data Line GROUND HR_SMB_5V_CLK Clock Line P5V_STBY POWER Table 20.

  • Page 39: Vga Connector

    DDCDAT DDCCLK Note: NC (No Connect) in this project NIC Connector The Intel® Server Board SE7221BK1-E supports two NIC RJ45 connectors. The following tables detail the pin-out of the connector. Table 23. NIC1-82541PI(10/100/1000) Connector Pin-out (J5A1) Signal Name Signal Name...

  • Page 40: Ide Connector

    SE7221BK1-E Technical Product Specification Signal Name Signal Name P1V8_STB_LAN1 P3V3_STB LAN1_TRDP2 LAN1_LINK1000_N LAN1_TRDN2 LINK100_L Table 24. NIC2-82541PI (10/100/1000) Connector Pin-out (J6A1) Signal Name Signal Name P1V8_STB_LAN2 LAN2_TRDN0 LAN2_TRDN2 LAN2_TRDP0 LAN2_TRDP2 P1V8_STB_LAN2 LAN2_TRDP1 LAN2_LINK100_N LAN2_TRDN1 LAN2_LINK1000_N P1V8_STB_LAN2 LAN2_LINK_UP_N P1V8_STB_LAN2 LAN2_ACT_N LAN2_TRDP3...

  • Page 41: Sata Connector

    SE7221BK1-E Technical Product Specification SATA Connector ICH6R integrated a SATA controller with four SATA ports output. The pin-out for these four connectors is listed below. Table 26. SATA Connector Pin-out (J1G1, J1G2, J1J2, J2J1) Signal Name SATA0_TX_P SATA0_TX_N SATA0_RX_N SATA0_RX_P USB Connector The following table provides the pin-out for the dual external USB connectors.

  • Page 42: Floppy Connector

    FDSKCHG# 7.10 Serial Port Connector Two serial ports are provided on the Intel® Server Board SE7221BK1-E. A standard, external DB9 serial connector is located on the back edge of the baseboard to supply a Serial A interface. This connector is combined with VGA connector (J8A1) A Serial B port is provided through a 9-pin header (J1B1) on the server board.

  • Page 43: 7.11 Keyboard And Mouse Connector

    SE7221BK1-E Technical Product Specification Table 31. 9-pin Header Serial B Port Pin-out (J1B1) Signal Name Signal Name DCDB DSRB RXDB RTSB TXDB CTSB DTRB 7.11 Keyboard and Mouse Connector Two PS/2 ports are provided for use by a keyboard and a mouse. The following table details the pin-out of the PS/2 connectors.

  • Page 44: Intrusion Cable Connector

    SE7221BK1-E Technical Product Specification There are also four 8-pin fan headers. (J6J1, J6J2, J6J3, J6J4) These fan headers have the same pin-out and are detailed below. Table 34. Eight-pin Fan Header Pin-out (J6J1, J6J2, J6J3, and J6J4) Signal Name Type...

  • Page 45: Rolling Bios Selection Header

    Secondary BIOS complete details. Configuration Jumpers This section describes configuration jumper options on the Intel® Server Board SE7221BK1-E. System Recovery and Update Jumpers An 11-pin (Key in pin 4, 8) Header (J1F2), located just beside the PCI Slot 1 connectors, provides a total of three 3-pin jumper blocks that are used to configure several system recovery and update options.

  • Page 46: Bios Setup Utility

    SE7221BK1-E Technical Product Specification Force erase SUPER IO. The system BIOS reads these GPIs status and decides whether or not to PASSWORD CLEAR Protect execute related task. The clear CMOS status Erase is reflected to ICH6. Defaults are in bold.
  • Page 47 SE7221BK1-E Technical Product Specification Option Description Exit The ESC key provides a mechanism for backing out of any field. This key will undo the pressing of the Enter key. When the ESC key is pressed while editing any field or selecting features of a menu, the parent menu is re-entered.

  • Page 48: Entering Bios Setup

    SE7221BK1-E Technical Product Specification Option Description Save Changes and Pressing F10 causes the following message to appear: Exit Save configuration changes and exit setup? [OK] [Cancel] If “OK” is selected and the Enter key is pressed, all changes are saved and setup is exited.

  • Page 49: Advanced Menu

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Language English Use [ENTER], [Up Arrow], [Down Select the current default language Arrow] to select language. used by BIOS. French German Italian Spanish 9.5.2 Advanced menu Table 41. BIOS Setup, Advanced Menu Options...

  • Page 50: Table 43. Bios Setup Ide Configuration Menu Options

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Hyper-Threading Enabled "ENABLE: Enable CPU Controls Hyper-Threading state. Technology Hyperthreading for HT enabled Primarily used to support older Disabled processor(s). Operating Systems that do not support Hyper Threading. DISABLE: Disable CPU Hyperthreading for HT enabled processor(s)."...

  • Page 51: Table 44. Bios Setup, Ide Device Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Secondary IDE Slave While entering setup, BIOS auto Selects submenu with additional detects the presence of IDE device details. devices. This displays the status of auto detection of IDE devices. Third IDE Master...

  • Page 52: Table 45. Bios Setup, Floppy Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Block (Multi-Sector Disabled Disabled: The Data transfer from The Auto setting should work in Transfer) Auto and to the device occurs one sector most cases. at a time. Auto: The data transfer from and to the device occurs multiple sectors at a time if the device supports it.

  • Page 53: Table 47. Bios Setup, Usb Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Serial Port 2 Address Disabled Allows BIOS to Select Serial Port2 Option that is used by other serial port Base Addresses. is hidden to prevent conflicting 3F8/IRQ4 settings. 2F8/IRQ3 3E8/IRQ4 2E8/IRQ3 9.5.2.5 USB configuration sub-menu Table 47. BIOS Setup, USB Configuration Sub-menu Selections...

  • Page 54: Table 49. Bios Setup, Pci Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Emulation Type If Auto, USB devices less than 530 MB will be emulated Auto Floppy as Floppy and remaining as hard drive. Forced FDD Forced option can be user to force a HDD formatted drive to boot as FDD (Ex.

  • Page 55: Boot Menu

    SE7221BK1-E Technical Product Specification 9.5.2.7 Memory configuration sub-menu This sub-menu provides information about the DIMM’s detected by BIOS. The DIMM number is printed on the baseboard next to each device. Table 50. BIOS Setup, Memory Configuration Sub-menu Selections Feature Options...

  • Page 56: Table 52. Bios Setup, Boot Settings Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification 9.5.3.1 Boot settings configuration sub-menu selections Table 52. BIOS Setup, Boot Settings Configuration Sub-menu Selections Feature Options Help Text Description Quick Boot Disabled Allows BIOS to skip certain tests while booting. This will decrease the time needed to boot the system.

  • Page 57: Chipset Menu

    SE7221BK1-E Technical Product Specification 9.5.3.2.2 Removable drive sub-menu selections Table 55. BIOS Setup, Removable Drives Sub-menu Selections Feature Options Help Text Description 1st Drive Varies Specifies the boot sequence from the available Varies based on system configuration. devices. nth Drive...

  • Page 58: Table 59. Bios Setup, Atapi Cdrom Drives Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description DRAM CAS# 3, 2.5, 2 Select CAS latency to be used Greyed when DRAM timing Latency programming are done using SPD. Selects the CAS latency value to be programmed when manual configuration of DRAM parameters are used.

  • Page 59: Security Menu

    SE7221BK1-E Technical Product Specification PCI-EX Port Title Configuration VC1 for Root Port Disabled Enable / Disable VC1 feature VC1 feature setting on PCI Express* Root port Enabled 9.5.4.3 PXH Bridge Configuration Table 60. BIOS Setup, ATAPI CDROM Drives Sub-menu Selections...

  • Page 60: Server Menu

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Clear User Immediately clears the user Admin uses this option to clear Password password. User password (Admin password is used to enter setup is required). This node is hidden if Administrator password is not installed.

  • Page 61: Table 63. Bios Setup, System Management Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Assert NMI on PERR Disabled If enabled, NMI is generated. SERR option needs to be enabled to activate this option. Enabled Assert NMI on SERR Disabled If enabled, NMI is generated on SERR and logged.

  • Page 62: Table 64. Bios Setup Serial Console Features Sub-Menu Selections

    SE7221BK1-E Technical Product Specification PIA Revision Field contents varies SDR Revision Field contents varies 9.5.6.2 Serial Console features sub-menu selections Table 64. BIOS Setup Serial Console Features Sub-menu Selections Feature Options Help Text Description BIOS Redirection Port Disabled If enabled, BIOS uses the specified serial port to redirect the console to a remote ANSI terminal.

  • Page 63: Exit Menu

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description ECC Event Logging Disabled Enables or Disables ECC Event Logging. Grayed out if "Critical Enabled Event Logging" option is disabled. PCI Error Logging Enables or Disables PCI Error Logging. Grayed out if...
  • Page 64 Obtaining the Upgrade Utility You can upgrade to a new version of the BIOS using the new BIOS files and the BIOS upgrade utility. You can obtain the BIOS upgrade file and the utility from the Intel Customer Support Web site: http://support.intel.com/support/motherboards/server/SE7221BK1-E.

  • Page 65: Flash Architecture And Flash Update Utility

    The flash ROM contains system initialization routines, the BIOS Setup Utility, and runtime support routines. The exact layout is subject to change, as determined by Intel. A 64 KB user block is available for user ROM code or custom logos. The flash ROM also contains initialization code in compressed form for on-board peripherals, like SCSI, NIC and video controllers.
  • Page 66 SE7221BK1-E Technical Product Specification 9.6.3.1 Recovery Mode Three conditions can cause the system to enter recovery mode. Pressing a hot-key, setting the recovery jumper, and damage to both partitions of the ROM image will cause the system to enter recovery and update System ROM without the boot-block.
  • Page 67 SE7221BK1-E Technical Product Specification 4) After reading the file it increments the file extension and then searches for AMIBOOT.001 in the same floppy. 5) If doesn't find the file in the floppy it will beep for once (1sec) and search again.

  • Page 68: Error Handling And Reporting

    SE7221BK1-E Technical Product Specification 9) Plug the system into the AC power source and power it up to confirm that the recovery was successful. Figure 7. BIOS Recovery Jumper Error Handling and Reporting 9.7.1 POST Error Beep Codes Table 67. POST Error Beep Codes...

  • Page 69: Bios Event Log

    SE7221BK1-E Technical Product Specification Table 68. BIOS Recovery Beep Codes Beeps Error Message POST Progress Code Description Recovery Started Start of recovery process Recovery Boot Error Flashing series of POST Unable to boot to floppy, ATAPI, or ATAPI codes: EFh, FAh, FBh, CD-ROM.

  • Page 70: Post Progress Codes And Messages

    SE7221BK1-E Technical Product Specification Error Code Error Message Response LANGUAGE_MODULE_ERR) Primary Master Hard Disk Error Pause Primary Slave Hard Disk Error Pause Secondary Master Hard Disk Error Pause Secondary Slave Hard Disk Error Pause Primary Master Drive - ATAPI Incompatible...
  • Page 71 SE7221BK1-E Technical Product Specification Checkpoint Description Initializes the interrupt controlling hardware (generally PIC) and interrupt vector table. Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt.
  • Page 72 SE7221BK1-E Technical Product Specification Checkpoint Description Initializes remaining option ROMs. Generate and write contents of ESCD in NVRam. Log errors encountered during POST. Display errors to the user and gets the user response for error. Execute BIOS setup if needed / requested.

  • Page 73: Table 71. Bootblock Initialization Code Checkpoints

    SE7221BK1-E Technical Product Specification 9.7.3.2 Boot Block Initialization Code Checkpoints The Boot Block initialization code sets up the chipset, memory and other components before system memory is available. The following table describes the type of checkpoints that may occur during the boot block initialization.

  • Page 74: Table 72. Bootblock Recovery Code Checkpoints

    SE7221BK1-E Technical Product Specification 9.7.3.3 Boot Block Recovery Code Checkpoints The Boot block recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt. The...

  • Page 75: Table 73. Dim Code Checkpoints

    SE7221BK1-E Technical Product Specification 9.7.3.4 DIM Code Checkpoints The Device Initialization Manager Module gets control at various times during BIOS POST to initialize different BUSes. The following table describes the main checkpoints where the DIM module is accessed. Table 73. DIM Code Checkpoints...

  • Page 76: Diagnostic Leds

    SE7221BK1-E Technical Product Specification Diagnostic LEDs All port 80 codes are displayed using the Diagnostic LEDs found on the back edge of the baseboard. The diagnostic LED feature consists of a hardware decoder and four dual color LEDs. During POST, the LEDs will display all normal POST codes representing the progress of the BIOS POST.

  • Page 77: Table 77. Post Progress Codes

    SE7221BK1-E Technical Product Specification Diagnostic LED Description Decoder G=Green, R=Red, A=Amber Pass control to the uncompressed code in shadow RAM. The initialization code is copied to segment 0 and control will be transferred to segment 0. Control is in segment 0. Verify the system BIOS checksum.
  • Page 78 SE7221BK1-E Technical Product Specification Diagnostic LED Description Decoder G=Green, R=Red, A=Amber Keyboard Init: The keyboard controller command byte is written. Next, issuing the pin 23 and 24 blocking and unblocking commands Disable and initialize 8259 Detect Configuration Mode, such as CMOS clear.
  • Page 79 SE7221BK1-E Technical Product Specification Diagnostic LED Description Decoder G=Green, R=Red, A=Amber Extended background memory test start Disable parity and NMI reporting. Test 8237 DMA Controller: The DMA page register test passed. Performing the DMA Controller 1 base register test next Init 8237 DMA Controller: The DMA controller 2 base register test passed.

  • Page 80: 10. Power Information

    10. Power Information 10.1 Intel® Server Board SE7221BK1-E Power Budget The following table shows the power consumed on each supply line for the SE7221BK1-E baseboard that is configured with one processor (128W max). This configuration includes four 1 GB DDR2 DIMMs stacked burst at 70% max. The numbers provided in the table should be used for reference purposes only.

  • Page 81: 10.2 Power Supply Specifications

    SE7221BK1-E Technical Product Specification 10.2 Power Supply Specifications This section provides power supply design guidelines for the baseboard, including voltage and current specifications, and power supply on/off sequencing characteristics. Table 79. The Board Power Supply Voltage Specification PARAMETER TOLERANCE UNITS + 3.3V...

  • Page 82: Table 81. Turn On/Off Timing

    SE7221BK1-E Technical Product Specification Vout Vout Tvout_off Tvout_rise Tvout_on Figure 8. Output Voltage Timing Table 81. Turn On/Off Timing Item Description UNITS Delay from AC being applied to 5VSB being within Tsb_on_delay msec 1500 regulation. T ac_on_delay Delay from AC being applied to all output voltages...

  • Page 83: Dynamic Loading

    SE7221BK1-E Technical Product Specification AC Input vout_holdup Vout pwok_low AC_on_delay pwok_off sb_on_delay sb_on_delay pwok_on pwok_on PWOK pson_pw pwok_holdup 5VSB sb_vout 5VSB holdup pson_on_delay PSON AC turn on/off cycle PSON turn on/off cycle Figure 9. Turn On/Off Timing (Power Supply Signals) 10.2.2...

  • Page 84: Ac Line Transient Specification

    SE7221BK1-E Technical Product Specification 10.2.3 AC Line Transient Specification AC line transient conditions shall be defined as “sag” and “surge” conditions. “Sag” conditions are also commonly referred to as “brownout”, these conditions will be defined as the AC line voltage dropping below nominal voltage conditions. “Surge” will be defined to refer to conditions when the AC line voltage rises above nominal voltage.

  • Page 85: 11.1 Mean Time Between Failures (Mtbf) Test Results

    This section provides results of MTBF testing done by a 3 party testing facility. MTBF is a standard measure for the reliability and performance of the board under extreme working conditions. For the SE7221BK1-E server board, MTBF was measured at 190,727 hours at 40 degrees Centigrade. 12. Hardware Monitoring 12.1 Monitored Components...
  • Page 86 SE7221BK1-E Technical Product Specification FANIN0 (PIN #66) Monitors SYS FAN_2 (JP7A1) / SYS FAN_5A (J6J1) Super IO FANIN1 (PIN #81) Monitors SYS FAN_1 (JP6A1) / SYS FAN_5B (J6J1) Super IO FANIN2 (PIN #77) Monitors SYS FAN_6A (J6J2) Super IO FANIN3 (PIN #76) Monitors SYS FAN_6B (J6J2)

  • Page 87: 12.2 Fan Speed Control

    SE7221BK1-E Technical Product Specification 12.2 Fan Speed Control J7A11 LM96000 PWM1 FAN SPEED CNTL1 PWM2 JP5J1 FAN3 TACH1 TACH2 JP5J2 FAN4 TACH3 JP7A1 FAN2 Super IO JP6A1 FAN1 PC87427 FANIN0 SYS FAN5 FANIN1 J6J1 FANIN2 FANIN3 SYS FAN6 J6J2 FANIN4...

  • Page 88: 12.3 Chassis Intrusion

    SE7221BK1-E Technical Product Specification 12.3 Chassis Intrusion The Intel® Server Board SE7221BK1-E supports a chassis security feature that detects if the chassis cover is removed. For the chassis intrusion circuit to function, the chassis’ power supply must be connected to AC power. The security feature uses a mechanical switch on the chassis that attaches to the chassis intrusion connector.

  • Page 89: 13.2 Electromagnetic Compatibility Notices

    SE7221BK1-E Technical Product Specification Table 87. Product Certification Markings UL Recognition Mark CE Mark Russian GOST Mark Australian C-Tick Mark BSMI DOC Marking BSMI EMC Warning RRL MIC Mark 13.2 Electromagnetic Compatibility Notices 13.2.1 FCC (USA) This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.

  • Page 90: Industry Canada (Ices-003)

    SE7221BK1-E Technical Product Specification cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate the receiving antenna.

  • Page 91: Australia / New Zealand

    SE7221BK1-E Technical Product Specification The English translation for the above is as follows: 1. Type of Equipment (Model Name): SE7221BK1-E 2. Certification No.: Contact Intel Representative 3. Name of Certification Recipient: Intel 4. Date of Manufacturer: Marked on Product 5. Manufacturer / Nation : Intel 13.2.6...

  • Page 92: Calculated Mean Time Between Failures (Mtbf)

    SE7221BK1-E Technical Product Specification 13.4 Calculated Mean Time Between Failures (MTBF) The MTBF (Mean Time Between Failures) for the Intel® Server Board SE7221BK1-E as configured from the factory is shown in the table below. Table 88. MTBF Data Product Code...

  • Page 93: Figure 11. Se7221Bk1-E Server Board Mechanical Drawing

    SE7221BK1-E Technical Product Specification Figure 11. SE7221BK1-E Server Board Mechanical Drawing...

  • Page 94: Figure 12. Sku 1 Pedestal Mount I/O Shield Mechanical Drawing

    SE7221BK1-E Technical Product Specification The following figures show the I/O shield mechanical drawings for use in pedestal mount applications such as the Intel® Server Chassis SC5200 for both sku ’s (SE7221BK1-E and SE7221BK1-E (LX). Figure 12. sku 1 Pedestal mount I/O shield mechanical drawing...

  • Page 95: Figure 13. Sku 2 Pedestal Mount I/O Shield Mechanical Drawing

    SE7221BK1-E Technical Product Specification Figure 13. sku 2 Pedestal mount I/O shield mechanical drawing...

  • Page 97: Glossary

    Glossary SE7221BK1-E Technical Product Specification Glossary This appendix contains important terms used in the preceding chapters. For ease of use, numeric entries are listed first (e.g., “82460GX”) with alpha entries following (e.g., “AGP 4x”). Acronyms are then entered in their respective place, with non-acronyms following.
  • Page 98 Glossary SE7221BK1-E Technical Product Specification Term Definition Low pin count Least Significant Bit 1024 KB Multi-Bit Error milliseconds Most Significant Bit MTBF Mean Time Between Failures multiplexor Network Interface Card Non-maskable Interrupt Original equipment manufacturer Unit of electrical resistance PBGA...
  • Page 99 SE7221BK1-E Technical Product Specification Glossary Term Definition Universal Serial Bus Video Graphic Adapter Voltage Identification Voltage Regulator Module Word 16-bit quantity Zero Channel RAID...

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