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Intel SE7221BK1LX Technical Manual

Technical product specification
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Intel
Server Board
SE7221BK1-E
Technical Product Specification
Intel order number C91860-001
Revision 1.5
September 2005
Enterprise Platforms and Services Marketing

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Summary of Contents for Intel SE7221BK1LX

  • Page 1 ® Intel Server Board SE7221BK1-E Technical Product Specification Intel order number C91860-001 Revision 1.5 September 2005 Enterprise Platforms and Services Marketing...

  • Page 2: Revision History

    Added Adaptive Slot pinouts September 2005 Added supported video This product specification applies to the Intel® Server Board SE7221BK1-E with BIOS identifier SE7221BK10.86B. Changes to this specification will be published in the Intel® Server Board SE7221BK1-E Specification Update before being incorporated into a revision of this document.
  • Page 3 It is the responsibility of the system integrator that chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of airflow required for their specific application and environmental conditions.

  • Page 4: Table Of Contents

    5. I/O Subsystem ........................14 PCI Subsystem ...................... 14 5.1.1 P32-A: 32-bit/33-MHz PCI Subsystem..............14 5.1.2 P32-B 66-MHz PCI-X Subsystem (SE7221BK1LX sku only) ......15 5.1.3 P64-C 66/100-MHz PCI-X Subsystem..............16 5.1.4 PCI-E x8 ........................ 17 Video Controller ..................... 17 Network Interface Controller (NIC) ................
  • Page 5 Front Panel Switches..................... 24 6.1.2 Wake up Sources (ACPI and Legacy) ..............25 7. Connectors ......................... 26 Main Power Connector ..................26 Intel Adaptive Slot....................27 C Header ......................30 Front Panel Connector................... 31 VGA Connector...................... 33 NIC Connector ....................... 33 IDE Connector .......................
  • Page 6 Table 78. Boot Block POST Progress Codes ................. 69 Table 79. POST Progress Codes ..................... 70 10. Power Information......................73 10.1 Intel® Server Board SE7221BK1-E Power Budget ..........73 10.2 Power Supply Specifications ................. 74 10.2.1 Power Timing Requirements ................. 74 10.2.2...
  • Page 7 SE7221BK1-E Technical Product Specification 13.1.1 Product Safety Compliance ................... 82 13.1.2 Product EMC Compliance ..................82 13.1.3 Product Regulatory Compliance Markings ............82 13.2 Electromagnetic Compatibility Notices ..............83 13.2.1 FCC (USA)......................83 13.2.2 INDUSTRY CANADA (ICES-003)................84 13.2.3 Europe (CE Declaration of Conformity) ..............84 13.2.4 Taiwan Declaration of Conformity................
  • Page 8 Table 16. Supported Wake Events .................... 25 Table 17. Power Connector Pin-out (CN4H1)................26 Table 18. Auxiliary CPU Power Connector Pin-out (CN4B1)............. 26 Table 19. Intel Adaptive Slot pinout .................... 27 Table 20. HSBP Header Pin-out (J1D1) ..................30 Table 21. LCD Header Pin-out (J1C1)..................31 Table 22.
  • Page 9 SE7221BK1-E Technical Product Specification Table 33. 9-pin Header Serial B Port Pin-out (J1B1) ..............36 Table 34. Keyboard and Mouse PS/2 Connectors Pin-out (KM9A1) ......... 37 Table 35. Three-pin Fan Headers Pin-out (JP5J1, JP5J2, JP7A1, JP6A1)....... 37 Table 36. Eight-pin Fan Header Pin-out (J6J1, J6J2, J6J3, and J6J4)........37 Table 37.
  • Page 10 SE7221BK1-E Technical Product Specification Table 68. BIOS Setup, Exit Menu Selections ................57 Table 69. POST Error Beep Codes ................... 62 Table 70. BIOS Recovery Beep Codes ..................62 Table 71. POST Error Messages and Handling................. 63 Table 72. POST Code Checkpoints.................... 64 Table 73.
  • Page 11 SE7221BK1-E Technical Product Specification List of Figures Figure 1. Intel® Server Board SE7221BK1-E Diagram .............. 4 Figure 2. Memory Bank Label Definition..................8 Figure 3. Interrupt Routing Diagram ..................21 Figure 4. ICH6R Interrupt Routing Diagram................22 Figure 5. PXH Interrupt Routing Diagram .................. 23 Figure 6.

  • Page 13: Introduction

    SE7221BK1-E Technical Product Specification Introduction This Intel® Server Board SE7221BK1-E Technical Product Specification (TPS) provides a high- ® level technical description for the Intel Server Board SE7221BK1-E. It details the architecture and feature set for all functional sub-systems that make up the server board.

  • Page 14: Server Board Overview

    One Intel® 10/100/1000 82541PI gigabit Ethernet Controller Segment C: Two PCI-X 64-bit/66-MHz, 3.3 V slots supporting full length / full height PCI / PCI-X add-in cards or one 3.3V PCI-X 64-bit/100-MHz slot with riser card (SE7221BK1LX sku only) Segment D: One x8 PCI Express* slot supporting x1/x2/x4/x8 PCI Express* add-in card...
  • Page 15 SE7221BK1-E Technical Product Specification USB 2.0 Two external Universal Serial Bus (USB) ports with an additional internal header providing two optional USB ports for front panel support. -Supports wake-up from sleeping states S1-S4 -Supports legacy Keyboard/Mouse connections when using PS2-USB dongle LPC (Low Pin Count) bus segment with one embedded devices: Super I/O (Super IO) controller chip, NS PC87427, providing all PC-compatible I/O (floppy, serial, keyboard, mouse, two serial com port ) and integrated hardware monitoring...

  • Page 16: Figure 1. Intel® Server Board Se7221Bk1-E Diagram

    SE7221BK1-E Technical Product Specification Socket Q P O TP01326 Figure 1. Intel® Server Board SE7221BK1-E Diagram A Chassis Intrusion Header L DIMM Sockets (two – from left to 34-pin Front Panel Connector right: DIMM 1B, DIMM 2B) B PCI Slot M DIMM Sockets (two –...

  • Page 17: Functional Architecture

    The Intel® Server Board SE7221BK1-E has a VRD (Voltage Regulator Down) to support one processor. It is compliant with the VRM 10.1 DC-DC Converter Design Guide Line and provides a maximum of 120A, which is capable of supporting the requirements for Intel® Pentium® 4 and Intel® Celeron® D processors.

  • Page 18: Interrupts And Apic

    DIMM organization is x72, which includes eight ECC check bits. The memory interface runs at 400/533MT/s. The memory controller supports memory scrubbing, single-bit error correction and multiple-bit error detection and Intel® x4 SDDC support with x4 DIMMs. Memory can be implemented with either single sided (one row) or double-sided (two row) DIMMs.
  • Page 19 3200 MB. THIS IS ONLY AN ISSUE WHEN 4 GB OF MEMORY IS USED. A memory configuration of less than 4 GB will not be susceptible to this issue. Please refer to Intel® Technical Advisory TA 719-01 on the support web site located at http://support.intel.com/support/motherboards/server/SE7221BK1E.

  • Page 20: Table 2. Memory Bank Labels And Dimm Population Order

    SE7221BK1-E Technical Product Specification Table 2. Memory Bank Labels and DIMM Population Order Location DIMM Label Channel Population Order J8J1 (DIMM_1A) J8J2 (DIMM_2A) J9J2 (DIMM_1B) J9J1 (DIMM_2B) J8J2 J9J2 J9J1 J8J1 DIMM_1A DIMM_2A DIMM_1B DIMM_2B Channel B Channel A (Bank 2) (Bank 1) Figure 2.

  • Page 21: The Intel E7221 Chipset

    The Intel E7221 Chipset The Intel® Server Board SE7221BK1-E is designed around the Intel® E7221 chipset. The chipset provides an integrated I/O bridge and memory controller, and a flexible I/O subsystem core (PCI Express*). The chipset consists of three primary components: GMCH: Graphics Memory Control Hub.

  • Page 22: Gmch Memory Architecture Overview

    The GMCH is a 1210-ball FC-BGA device and uses the proven components of previous generations like the Intel® Pentium® 4 processor bus interface unit, the hub interface unit, and the DDR2 memory interface unit. In addition, the GMCH incorporates an integrated high performance graphics media accelerator and a PCI Express* interface.

  • Page 23: Ich6R

    Other features provided by the GMCH include the following: Full support of ECC on the processor bus Full support of Intel® x4 SDDC on the memory interface with x4 DIMMs Twelve deep in-order queue, two deep defer queue Full support of un-buffered DDR2 ECC DIMMs.
  • Page 24 The ICH6R contains one EHCI USB 2.0 controller and four USB ports. The USB controller moves data between main memory and up to four USB connectors. All ports function identically and with the same bandwidth. The Intel® Server Board SE7221BK1-E implements four ports on the board.

  • Page 25: Super I/O

    SE7221BK1-E Technical Product Specification Super I/O National Semiconductor* PC87427Super IO device contains all of the necessary circuitry to control two serial ports, one parallel port, floppy disk, PS/2-compatible keyboard and mouse and hardware monitor controller. The baseboard implements the following features: GPIOs Two serial ports Floppy...

  • Page 26: Bios Flash

    The primary I/O buses for the SE7221BK1-E are 3 independent PCI bus segments (4 independent segments with SE7221BK1LX sku) with PCI, PCI-E and two PCI-X buses. The PCI buses comply with the PCI Local Bus Specification, Rev 2.3. The P32-A bus segment is directed through the ICH6R.

  • Page 27: P32-B 66-Mhz Pci-X Subsystem (Se7221Bk1Lx Sku Only)

    5.1.2 P32-B 66-MHz PCI-X Subsystem (SE7221BK1LX sku only) One 32-bit PCI bus segment is directed through the PXH interface A. This PCI segment, P32-B, just has an embedded device, Intel® 82541PI LAN (NIC2) clocked at 66MHz. (SE7221BK1LX sku only) 5.1.2.1...

  • Page 28: P64-C 66/100-Mhz Pci-X Subsystem

    One 64-bit PCI-X bus segment is directed through the PXH. This PCI-X segment, P64-C, provides two 3.3V 64-bit PCI-X slots or one 3.3V 64-bit PCI-X riser slot, (SE7221BK1LX sku only) capable of up to 100 MHz operation (with 1 adapter, either slot is capable of 100MHz, only speeds of 66MHz are supported with two adapters populated) and supports full-length PCI and PCI-X adapters.

  • Page 29: Pci-E X8

    (82541PI controller) network interfaces. One is through ICH6R directly, and another one is through PXH (SE7221BK1LX sku only). The Intel® 82541PI Gigabit Ethernet is a single, compact component with an integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) functions. For desktop, workstation and mobile PC Network designs with critical space constraints, the Intel®...

  • Page 30: Nic Connector And Status Leds

    Transmit/Receive activity when blinking. The yellow LED indicates 1000-Mbps operation when lit, the green LED indicates 100-Mbps operation when lit and 10-Mbps when off. For the NIC 2 connector (SE7221BK1LX sku only), the yellow LED indicates network connection when on, and Transmit/Receive activity when blinking. The orange LED indicates 1000-Mbps operation when lit, the green LED indicates 100-Mbps operation when lit and 10- Mbps when off.

  • Page 31: Apic Interrupt Routing

    For APIC mode, the baseboard interrupt architecture incorporates three Intel I/O APIC devices to manage and broadcast interrupts to local APICs in each processor. The Intel® I/O APICs monitor each interrupt on each PCI device; including PCI slots in addition to the ISA compatibility interrupts IRQ (0-15).

  • Page 32: Pci Error Handling

    SE7221BK1-E Technical Product Specification PCI Error Handling The PCI bus defines two error pins, PERR# and SERR#, for reporting PCI parity errors and system errors, respectively. In the case of PERR#, the PCI bus master has the option to retry the offending transaction, or to report it using SERR#.

  • Page 33: Figure 3. Interrupt Routing Diagram

    SE7221BK1-E Technical Product Specification ICH6 IOAPIC 0 DMI INTERFACE IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 ICH6 IRQ10 ICH6 IRQ11 8259PIC IRQ12 IRQ13 IRQ14 IRQ15 IRQ16 IRQ17 IRQ18 IRQ19 IRQ20 IRQ21 IRQ22 IRQ23 X8 PCI-E interface INTR connector GMCH Figure 3.

  • Page 34: Figure 4. Ich6R Interrupt Routing Diagram

    SERIRQ Serial Port1/ISA Floppy/ISA SCI/ISA Mouse/ISA Coprocessor Error P IDE/ISA Not Used PIRQA# PIRQB# PIRQC# INTEL 82541PI(NIC1) PIRQD# Slot 1 INTC PIRQE# Slot 1 INTA PIRQF# PIRQG# Slot 1 INTB Slot 1 INTD PIRQH# Figure 4. ICH6R Interrupt Routing Diagram...

  • Page 35: Figure 5. Pxh Interrupt Routing Diagram

    SE7221BK1-E Technical Product Specification PA IRQ0 PA IRQ1 PA IRQ2 PA IRQ3 INTEL 82541PI(NIC2) PA IRQ4 PA IRQ5 PA IRQ6 PCI-X PA IRQ7 Interface PA IRQ8 PA IRQ9 PA IRQ10 PA IRQ11 PA IRQ12 PA IRQ13 PA IRQ14 PA IRQ15...

  • Page 36: Acpi Implementation

    SE7221BK1-E Technical Product Specification ACPI Implementation ACPI An ACPI-aware operating system generates an SMI to request that the system be switched into ACPI mode. The BIOS responds to enable ACPI mode. The system automatically returns to legacy mode upon hard reset or power-on reset. The SE7221BK1-E platform supports S0, S1, S4, and S5 states.

  • Page 37: Wake Up Sources (Acpi And Legacy)

    SE7221BK1-E Technical Product Specification supply through an inverter, and then transition to an ON state. The ICH6 is configured to generate an SMI due to a power button Power Button On to Off event. The BIOS services this SMI and sets the state of the (Legacy): machine in the ICH6 and Super IO to the OFF state.

  • Page 38: Connectors

    SE7221BK1-E Technical Product Specification Connectors Main Power Connector The main power supply connection is obtained using the 24-pin connector. The following table defines the pin-outs of the connector. Table 17. Power Connector Pin-out (CN4H1) Signal 18 AWG Color Signal 18 AWG Color +3.3VDC Orange +3.3VDC...

  • Page 39: Intel Adaptive Slot

    SE7221BK1-E Technical Product Specification Intel Adaptive Slot Table 19. Intel Adaptive Slot pinout Pin-Side PCI Spec Description Pin-Side PCI Spec Description Signal Signal Presnt1# SMCLK JTAG-TCK SMDATA JTAG-TDI JTAG-TDO 3.3V JTAG-TMS JTAG- 3.3V TRST# 3.3VAux 3.3V Wake# PERST# RSVD REFCLK1+...
  • Page 40 SE7221BK1-E Technical Product Specification HSOp(5) HSOn(5) HSIp(5) HSIn(5) HSOp(6) HSOn(6) HSIp(6) HSIn(6) HSOp(7) HSOn(7) HSIp(7) PRSNT2# HSIn(7) 8X end Blocks a x16 PCI- and allows a x8 to be Express board used instead Blocks a x16 PCI- Express board -12V INTB# INTD# INTA#...
  • Page 41 SE7221BK1-E Technical Product Specification AD[22] AD[21] +3.3V AD[19] AD[20] +3.3V AD[18] AD[17] C/BE[2]# AD[16] PCI-XCAP IRDY# +3.3V +3.3V FRAME# DEVSEL# TRDY# LOCK# PERR# STOP# +3.3V +3.3V 3.3V SERR# C/BE[1]# AD[14] AD[15] AD[12] +3.3V AD[10] AD[13] M66EN AD[11] AD[09] AD[08] C/BE[0]# AD[07] +3.3V +3.3V...

  • Page 42: I 2 C Header

    SE7221BK1-E Technical Product Specification 3.3V AD[60] AD[59] AD[58] AD[57] AD[56] AD[55] AD[54] AD[53] 3.3V AD[52] AD[51] AD[50] AD[49] 3.3V AD[48] AD[47] AD[46] AD[45] AD[44] AD[43] AD[42] AD[41] 3.3V AD[40] AD[39] AD[38] AD[37] 3.3V AD[36] AD[35] AD[34] AD[33] AD[32] Type1 Type(1:0) (1U)00 = PCI-Express, (1U)01 = PCI (1U)10 = N/A...

  • Page 43: Front Panel Connector

    SE7221BK1-E Technical Product Specification Signal Name Description GROUND HR_SMB_5V_CLK Clock Line GROUND Table 21. LCD Header Pin-out (J1C1) Signal Name Description HR_SMB_5V_DAT Data Line GROUND HR_SMB_5V_CLK Clock Line P5V_STBY POWER Table 22. LEGEND SE_LINK Header Pin-out (J2B1) Signal Name Description MBMC_SMC_PHL_DAT Data Line GROUND...
  • Page 44 SE7221BK1-E Technical Product Specification Signal Name Signal Name LAN2_ACT_N NMI switch# LAN2_LINK_UP_N P5V_STB P5V_STB FP_ID_LED_N FP_STATUS_LED1_N FP_ID_BTN_N Note: NC (No Connect) in this project...

  • Page 45: Vga Connector

    DDCDAT DDCCLK Note: NC (No Connect) in this project NIC Connector The Intel® Server Board SE7221BK1-E supports two NIC RJ45 connectors. The following tables detail the pin-out of the connector. Table 25. NIC1-82541PI(10/100/1000) Connector Pin-out (J5A1) Signal Name Signal Name...

  • Page 46: Ide Connector

    SE7221BK1-E Technical Product Specification Signal Name Signal Name LAN2_TRDN3 GND_CHASSIS IDE Connector The board provides one 40-pin ATA-100 IDE connector. Table 27. ATA 40-pin Connector Pin-out (J3J1) Signal Name Signal Name RESET# IDE_DD7 IDE_DD8 IDE_DD6 IDE_DD9 IDE_DD5 IDE_DD10 IDE_DD4 IDE_DD11 IDE_DD3 IDE_DD12 IDE_DD2...

  • Page 47: Usb Connector

    SE7221BK1-E Technical Product Specification USB Connector The following table provides the pin-out for the dual external USB connectors. This connector is combined with a RJ45 (connected to COM2 signals). Table 29. USB Connectors Pin-out (J5A1) Signal Name USB_B5_P USB_B5_N VCC_USB5 USB_B4_P USB_B4_N VCC_USB4...

  • Page 48: 7.11 Serial Port Connector

    FDSKCHG# 7.11 Serial Port Connector Two serial ports are provided on the Intel® Server Board SE7221BK1-E. A standard, external DB9 serial connector is located on the back edge of the baseboard to supply a Serial A interface. This connector is combined with VGA connector (J8A1) A Serial B port is provided through a 9-pin header (J1B1) on the server board.

  • Page 49: 7.12 Keyboard And Mouse Connector

    SE7221BK1-E Technical Product Specification 7.12 Keyboard and Mouse Connector Two PS/2 ports are provided for use by a keyboard and a mouse. The following table details the pin-out of the PS/2 connectors. Table 34. Keyboard and Mouse PS/2 Connectors Pin-out (KM9A1) PS/2 Connectors Signal Name Keyboard...

  • Page 50: Intrusion Cable Connector

    SE7221BK1-E Technical Product Specification Ground Power GROUND is the power supply ground Ground Power GROUND is the power supply ground Ground Power GROUND is the power supply ground Fan Tach FAN_TACH signal is connected to the Super IO/LM96000 to monitor the FAN speed.

  • Page 51: Configuration Jumpers

    SE7221BK1-E Technical Product Specification Configuration Jumpers This section describes configuration jumper options on the Intel® Server Board SE7221BK1-E. System Recovery and Update Jumpers An 11-pin (Key in pin 4, 8) Header (J1F2), located just beside the PCI Slot 1 connectors, provides a total of three 3-pin jumper blocks that are used to configure several system recovery and update options.

  • Page 52: Bios Setup Utility

    SE7221BK1-E Technical Product Specification BIOS Setup Utility The BIOS Setup utility is provided to perform system configuration changes and to display current settings and environment information. The BIOS Setup utility stores configuration settings in system non-volatile storage. Changes affected by BIOS Setup will not take effect until the system is rebooted. The BIOS Setup Utility can be accessed when prompted during POST by using the F2 key.
  • Page 53 SE7221BK1-E Technical Product Specification Option Description Exit The ESC key provides a mechanism for backing out of any field. This key will undo the pressing of the Enter key. When the ESC key is pressed while editing any field or selecting features of a menu, the parent menu is re-entered.

  • Page 54: Entering Bios Setup

    SE7221BK1-E Technical Product Specification Option Description Save Changes and Pressing F10 causes the following message to appear: Exit Save configuration changes and exit setup? [OK] [Cancel] If “OK” is selected and the Enter key is pressed, all changes are saved and setup is exited.

  • Page 55: Advanced Menu

    Processor Retest Enabled If enabled, all processors will be Rearms the processor sensors. activated and retested on the next Only displayed if the Intel® Disabled boot. This option will be Management Module is present. automatically reset to disabled on the next boot.

  • Page 56: Table 45. Bios Setup Ide Configuration Menu Options

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Hyper-Threading Enabled "ENABLE: Enable CPU Controls Hyper-Threading state. Technology Hyperthreading for HT enabled Primarily used to support older Disabled processor(s). Operating Systems that do not support Hyper Threading. DISABLE: Disable CPU Hyperthreading for HT enabled processor(s)."...

  • Page 57: Table 46. Bios Setup, Ide Device Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Secondary IDE Slave While entering setup, BIOS auto Selects submenu with additional detects the presence of IDE device details. devices. This displays the status of auto detection of IDE devices. Third IDE Master While entering setup, BIOS auto Selects submenu with additional detects the presence of IDE...

  • Page 58: Table 47. Bios Setup, Floppy Configuration Sub-Menu Selections

    Feature Options Help Text Description Floppy A Disabled Select the type of floppy drive Note: Intel no longer connected to the system. validates 720 Kb & 1.44 MB 3 1/2" 2.88 Mb drives. Onboard Floppy Controller Disabled Allows BIOS to Enable or Disable Floppy Controller.

  • Page 59: Table 49. Bios Setup, Usb Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Serial Port 2 Address Disabled Allows BIOS to Select Serial Port2 Option that is used by other serial port Base Addresses. is hidden to prevent conflicting 3F8/IRQ4 settings. 2F8/IRQ3 3E8/IRQ4 2E8/IRQ3 9.5.2.5 USB configuration sub-menu Table 49. BIOS Setup, USB Configuration Sub-menu Selections Feature Options Help Text...

  • Page 60: Table 51. Bios Setup, Pci Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Emulation Type If Auto, USB devices less than 530 MB will be emulated Auto Floppy as Floppy and remaining as hard drive. Forced FDD Forced option can be user to force a HDD formatted drive to boot as FDD (Ex.

  • Page 61: Boot Menu

    SE7221BK1-E Technical Product Specification 9.5.2.7 Memory configuration sub-menu This sub-menu provides information about the DIMM’s detected by BIOS. The DIMM number is printed on the baseboard next to each device. Table 52. BIOS Setup, Memory Configuration Sub-menu Selections Feature Options Help Text Description DIMM_1A...

  • Page 62: Table 54. Bios Setup, Boot Settings Configuration Sub-Menu Selections

    SE7221BK1-E Technical Product Specification 9.5.3.1 Boot settings configuration sub-menu selections Table 54. BIOS Setup, Boot Settings Configuration Sub-menu Selections Feature Options Help Text Description Quick Boot Disabled Allows BIOS to skip certain tests while booting. This will decrease the time needed to boot the system. Enabled Quiet Boot Disabled: Displays normal POST messages.

  • Page 63: Chipset Menu

    Opens sub screen to configure NB Configuration South Bridge Configure South bridge features Opens sub screen to configure SB Configuration Intel PCI Express* – Configure PXH device Opens sub screen to configure PCI-X configuration System management sub-menu selections 9.5.4.1 North Bridge Chipset Configuration Table 60.

  • Page 64: Table 61. Bios Setup, Atapi Cdrom Drives Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description DRAM CAS# 3, 2.5, 2 Select CAS latency to be used Greyed when DRAM timing Latency programming are done using SPD. Selects the CAS latency value to be programmed when manual configuration of DRAM parameters are used.

  • Page 65: Security Menu

    SE7221BK1-E Technical Product Specification PCI-EX Port Title Configuration VC1 for Root Port Disabled Enable / Disable VC1 feature VC1 feature setting on PCI Express* Root port Enabled 9.5.4.3 PXH Bridge Configuration Table 62. BIOS Setup, ATAPI CDROM Drives Sub-menu Selections Feature Options Help Text...

  • Page 66: Server Menu

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Clear User Immediately clears the user Admin uses this option to clear Password password. User password (Admin password is used to enter setup is required). This node is hidden if Administrator password is not installed.

  • Page 67: Table 65. Bios Setup, System Management Sub-Menu Selections

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description Assert NMI on PERR Disabled If enabled, NMI is generated. SERR option needs to be enabled to activate this option. Enabled Assert NMI on SERR Disabled If enabled, NMI is generated on SERR and logged.

  • Page 68: Table 66. Bios Setup Serial Console Features Sub-Menu Selections

    SE7221BK1-E Technical Product Specification PIA Revision Field contents varies SDR Revision Field contents varies 9.5.6.2 Serial Console features sub-menu selections Table 66. BIOS Setup Serial Console Features Sub-menu Selections Feature Options Help Text Description BIOS Redirection Port Disabled If enabled, BIOS uses the specified serial port to redirect the console to a remote ANSI terminal.

  • Page 69: Exit Menu

    SE7221BK1-E Technical Product Specification Feature Options Help Text Description ECC Event Logging Disabled Enables or Disables ECC Event Logging. Grayed out if "Critical Enabled Event Logging" option is disabled. PCI Error Logging Enables or Disables PCI Error Logging. Grayed out if Disabled Enabled "Critical...
  • Page 70 Obtaining the Upgrade Utility You can upgrade to a new version of the BIOS using the new BIOS files and the BIOS upgrade utility. You can obtain the BIOS upgrade file and the utility from the Intel Customer Support Web site: http://support.intel.com/support/motherboards/server/SE7221BK1-E.

  • Page 71: Flash Architecture And Flash Update Utility

    The flash ROM contains system initialization routines, the BIOS Setup Utility, and runtime support routines. The exact layout is subject to change, as determined by Intel. A 64 KB user block is available for user ROM code or custom logos. The flash ROM also contains initialization code in compressed form for on-board peripherals, like SCSI, NIC and video controllers.
  • Page 72 SE7221BK1-E Technical Product Specification 9.6.3.1 Recovery Mode Three conditions can cause the system to enter recovery mode. Pressing a hot-key, setting the recovery jumper, and damage to both partitions of the ROM image will cause the system to enter recovery and update System ROM without the boot-block. •...
  • Page 73 SE7221BK1-E Technical Product Specification 4) After reading the file it increments the file extension and then searches for AMIBOOT.001 in the same floppy. 5) If doesn't find the file in the floppy it will beep for once (1sec) and search again. 6) If it finds the first file and if it needs more files it will increment the file extension and searches again for AMIBOOT.002 this time it beeps 2 times (each beep 1sec long and with 0.5sec gap)

  • Page 74: Error Handling And Reporting

    SE7221BK1-E Technical Product Specification 9) Plug the system into the AC power source and power it up to confirm that the recovery was successful. Figure 7. BIOS Recovery Jumper Error Handling and Reporting 9.7.1 POST Error Beep Codes Table 69. POST Error Beep Codes Beeps Error Message POST Progress Code...

  • Page 75: Bios Event Log

    SE7221BK1-E Technical Product Specification Table 70. BIOS Recovery Beep Codes Beeps Error Message POST Progress Code Description Recovery Started Start of recovery process Recovery Boot Error Flashing series of POST Unable to boot to floppy, ATAPI, or ATAPI codes: EFh, FAh, FBh, CD-ROM.

  • Page 76: Post Progress Codes And Messages

    SE7221BK1-E Technical Product Specification Error Code Error Message Response LANGUAGE_MODULE_ERR) Primary Master Hard Disk Error Pause Primary Slave Hard Disk Error Pause Secondary Master Hard Disk Error Pause Secondary Slave Hard Disk Error Pause Primary Master Drive - ATAPI Incompatible Pause Primary Slave Drive - ATAPI Incompatible Pause...
  • Page 77 SE7221BK1-E Technical Product Specification Checkpoint Description Initializes the interrupt controlling hardware (generally PIC) and interrupt vector table. Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt. Traps INT1Ch vector to "POSTINT1ChHandlerBlock."...

  • Page 78: Table 73. Bootblock Initialization Code Checkpoints

    SE7221BK1-E Technical Product Specification Checkpoint Description Initializes remaining option ROMs. Generate and write contents of ESCD in NVRam. Log errors encountered during POST. Display errors to the user and gets the user response for error. Execute BIOS setup if needed / requested. Late POST initialization of chipset registers.

  • Page 79: Table 74. Bootblock Recovery Code Checkpoints

    SE7221BK1-E Technical Product Specification If memory sizing module not executed, start memory refresh and do memory sizing in Bootblock code. Do additional chipset initialization. Re-enable CACHE. Verify that flat mode is enabled. Test base 512KB memory. Adjust policies and cache first 8MB. Set stack. Bootblock code is copied from ROM to lower system memory and control is given to it.

  • Page 80: Table 75. Dim Code Checkpoints

    SE7221BK1-E Technical Product Specification Start reading FAT table and analyze FAT to find the clusters occupied by the recovery file. Start reading the recovery file cluster by cluster. Disable L1 cache. Check the validity of the recovery file configuration to the current configuration of the flash part.

  • Page 81: Diagnostic Leds

    SE7221BK1-E Technical Product Specification First ASL check point. Indicates the system is running in ACPI mode. System is running in APIC mode. 01, 02, 03, 04, 05 Entering sleep state S1, S2, S3, S4, or S5. 10, 20, 30, 40, 50 Waking from sleep state S1, S2, S3, S4, or S5.

  • Page 82: Table 79. Post Progress Codes

    SE7221BK1-E Technical Product Specification Diagnostic LED Description Decoder G=Green, R=Red, A=Amber Get start of initialization code and check BIOS header. Memory sizing. Test base 512K of memory. Return to real mode. Execute any OEM patches and set up the stack. Pass control to the uncompressed code in shadow RAM.
  • Page 83 SE7221BK1-E Technical Product Specification Diagnostic LED Description Decoder G=Green, R=Red, A=Amber Keyboard Controller Test: The keyboard controller input buffer is free. Next, issuing the BAT command to the keyboard controller Keyboard/Mouse port swap, if needed Write Command Byte 8042: The initialization after the keyboard controller BAT command test is done.
  • Page 84 SE7221BK1-E Technical Product Specification Diagnostic LED Description Decoder G=Green, R=Red, A=Amber Reset IDE Controllers Displaying bus initialization error messages. Display Setup Message: The new cursor position has been read and saved. Displaying the Hit Setup message next. Ensure Timer Keyboard Interrupts are on. Extended background memory test start Disable parity and NMI reporting.
  • Page 85 SE7221BK1-E Technical Product Specification Diagnostic LED Description Decoder G=Green, R=Red, A=Amber Prepare USB controllers for operating system One Beep to indicate end of POST. No beep if silent boot is enabled. 000h POST completed. Passing control to INT 19h boot loader next.

  • Page 86: 10. Power Information

    SE7221BK1-E Technical Product Specification 10. Power Information 10.1 Intel® Server Board SE7221BK1-E Power Budget The following table shows the power consumed on each supply line for the SE7221BK1-E baseboard that is configured with one processor (128W max). This configuration includes four 1 GB DDR2 DIMMs stacked burst at 70% max.

  • Page 87: Table 81. The Board Power Supply Voltage Specification

    SE7221BK1-E Technical Product Specification 350W peak 3.3V/5V 100W 1Amin 1Amin 2Amin 2Amin 0Amin 1Amin combined power 12V + 12WRM max of 20A 10.2 Power Supply Specifications This section provides power supply design guidelines for the baseboard, including voltage and current specifications, and power supply on/off sequencing characteristics. Table 81.

  • Page 88: Table 83. Turn On/Off Timing

    SE7221BK1-E Technical Product Specification Vout Vout Tvout_rise Tvout_off Tvout_on Figure 8. Output Voltage Timing Table 83. Turn On/Off Timing Item Description UNITS Tsb_on_delay Delay from AC being applied to 5VSB being within msec 1500 regulation. T ac_on_delay Delay from AC being applied to all output voltages msec 2500 being within regulation.

  • Page 89: Dynamic Loading

    SE7221BK1-E Technical Product Specification T pwok_off Delay from PWOK de-asserted to output voltages msec (3.3V, 5V, 12V, -12V) dropping out of regulation limits. Duration of PWOK being in the de-asserted state Tpwok_low msec during an off/on cycle using AC or the PSON signal. Delay from 5VSB being in regulation to O/Ps being in Tsb_vout msec...

  • Page 90: Ac Line Fast Transient (Eft) Specification

    SE7221BK1-E Technical Product Specification 250 μF +3.3V 5.0A 0.25 A/μsec 400 μF 6.0A 0.25 A/μsec 500 μF 9.0A 0.25 A/μsec 20 μF +5VSB 0.5A 0.25 A/μsec Notes 1) Step loads on each 12V output may happen simultaneously. 2) For Load Range 2 (light system loading), the tested step load size should be 60% of those listed. 10.2.3 AC Line Transient Specification AC line transient conditions shall be defined as “sag”...

  • Page 91: 11. Absolute Maximum Ratings

    SE7221BK1-E Technical Product Specification 11. Absolute Maximum Ratings Operating the board at conditions beyond those shown in the following table may cause permanent damage to the system. The table is provided for stress testing purposes only. Exposure to absolute maximum rating conditions for extended periods may affect system reliability.

  • Page 92: 12. Hardware Monitoring

    12. Hardware Monitoring 12.1 Monitored Components The Intel® Server Board SE7221BK1-E has an integrated LM96000 chip that is responsible for hardware monitoring. The LM96000 chip provides basic server hardware monitoring which alerts a system administrator if a hardware problem occurs on the board. The NS super IO PC87427 has implemented some FAN speed control/monitor pins.

  • Page 93: 12.2 Fan Speed Control

    SE7221BK1-E Technical Product Specification 12.2 Fan Speed Control J7A11 LM96000 PWM1 FAN SPEED CNTL1 PWM2 JP5J1 FAN3 TACH1 TACH2 JP5J2 FAN4 TACH3 JP7A1 FAN2 Super IO JP6A1 FAN1 PC87427 FANIN0 SYS FAN5 FANIN1 J6J1 FANIN2 FANIN3 SYS FAN6 J6J2 FANIN4 SYS FAN8 FANIN5 J6J4...

  • Page 94: 12.3 Chassis Intrusion

    SE7221BK1-E Technical Product Specification 12.3 Chassis Intrusion The Intel® Server Board SE7221BK1-E supports a chassis security feature that detects if the chassis cover is removed. For the chassis intrusion circuit to function, the chassis’ power supply must be connected to AC power. The security feature uses a mechanical switch on the chassis that attaches to the chassis intrusion connector.

  • Page 95: 13.2 Electromagnetic Compatibility Notices

    (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. For questions related to the EMC performance of this product, contact: Intel Corporation 5200 N.E. Elam Young Parkway Hillsboro, OR 97124...

  • Page 96: Industry Canada (Ices-003)

    SE7221BK1-E Technical Product Specification cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate the receiving antenna.

  • Page 97: Australia / New Zealand

    SE7221BK1-E Technical Product Specification The English translation for the above is as follows: 1. Type of Equipment (Model Name): SE7221BK1-E 2. Certification No.: Contact Intel Representative 3. Name of Certification Recipient: Intel 4. Date of Manufacturer: Marked on Product 5. Manufacturer / Nation : Intel 13.2.6...

  • Page 98: Calculated Mean Time Between Failures (Mtbf)

    SE7221BK1-E Technical Product Specification 13.4 Calculated Mean Time Between Failures (MTBF) The MTBF (Mean Time Between Failures) for the Intel® Server Board SE7221BK1-E as configured from the factory is shown in the table below. Table 90. MTBF Data Product Code...

  • Page 99: Figure 11. Se7221Bk1-E Server Board Mechanical Drawing

    SE7221BK1-E Technical Product Specification Figure 11. SE7221BK1-E Server Board Mechanical Drawing...

  • Page 100: Figure 12. Sku 1 Pedestal Mount I/O Shield Mechanical Drawing

    SE7221BK1-E Technical Product Specification The following figures show the I/O shield mechanical drawings for use in pedestal mount applications such as the Intel® Server Chassis SC5200 for both sku ’s (SE7221BK1-E and SE7221BK1-E (LX). Figure 12. sku 1 Pedestal mount I/O shield mechanical drawing...

  • Page 101: Figure 13. Sku 2 Pedestal Mount I/O Shield Mechanical Drawing

    SE7221BK1-E Technical Product Specification Figure 13. sku 2 Pedestal mount I/O shield mechanical drawing...

  • Page 103: Glossary

    Field replaceable unit 1024 MB. GPIO General purpose I/O GUID Globally Unique ID Hertz (1 cycle/second) Hardware Design Guide Inter-integrated circuit bus ® Intel architecture ICMB Intelligent Chassis Management Bus IERR Internal error Inter Module Bus Internet Protocol Interrupt Request In-target probe...
  • Page 104 Glossary SE7221BK1-E Technical Product Specification Term Definition Low pin count Least Significant Bit 1024 KB Multi-Bit Error milliseconds Most Significant Bit MTBF Mean Time Between Failures multiplexor Network Interface Card Non-maskable Interrupt Original equipment manufacturer Unit of electrical resistance PBGA Pin Ball Grid Array PERR Parity Error...
  • Page 105 SE7221BK1-E Technical Product Specification Glossary Term Definition Universal Serial Bus Video Graphic Adapter Voltage Identification Voltage Regulator Module Word 16-bit quantity Zero Channel RAID...

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