Fsb Frequency Select Signals (Bsel[2:0]); Phase Lock Loop (Pll) And Filter; Bsel[2:0] Frequency Table For Bclk[1:0] - Intel Quad-Core Xeon 3300 Series Datasheet

Electrical Specifications
The Yorkfield processor will operate at a 1333 MHz FSB frequency (selected by a 333
MHz BCLK[1:0] frequency). Individual processors will only operate at their specified
FSB frequency.
For more information about these signals, refer to
platform design guidelines.
Table 2-15. BSEL[2:0] Frequency Table for BCLK[1:0]
BSEL2
L
L
L
L
H
H
H
H
2.9.3

Phase Lock Loop (PLL) and Filter

An on-die PLL filter solution will be implemented on the processor. The VCCPLL input is
used for the PLL. Refer to
platform design guidelines for decoupling and routing guidelines.
Datasheet
BSEL1 BSEL0
L L
L H
H H
H L
H L
H H
L H
L L
Table 2-3 for DC specifications. Refer to the appropriate
Section 4.2 and the appropriate
FSB Frequency
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
333 MHz
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