Fujitsu EVB JADE-­D Manual page 23

Interface board
Table of Contents

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Prepared
Manfred Ortmann
Approved
Pin
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
Document Number
Checked
Date
2009­10­05
Signal
CPU_D9
Data
MEM_XWR1
Write Strobe
CPU_D10
Data
MEM_XRD
Read Strobe
CPU_D13
Data
MEM_CS2
Chip Select 2
CPU_A2
Address
MEM_CS0
Chip Select 0
CPU_A6
Address
CPU_A22
Address
CPU_A5
Address
CPU_A21
Address
CPU_A10
Address
MEM_XWR0
Write Strobe
CPU_A9
Address
CPU_A24
Address
CPU_A14
Address
MEM_RDY
Ready input for slow device
CPU_A13
Address
JADE_VO0_23
Digital RGB output 0 Data B7 
CPU_A18
Address
JADE_VO0_22
Digital RGB output 0 Data B6
CPU_A17
Address
JADE_VO0_18
Digital RGB output 0 Data B2
JADE_IO_G4_28
IDE_DD_3 / GPIO_PD_15 
JADE_VO0_19
Digital RGB output 0 Data B3
JADE_IO_G4_29
IDE_DD_2 / GPIO_PD_14 
JADE_VO0_14
Digital RGB output 0 Data G4
JADE_IO_G4_30
IDE_DD_1 / GPIO_PD_13 
JADE_VO0_15
Digital RGB output 0 Data G5
JADE_IO_G4_31
IDE_DD_0 / ­­­ 
VIN0_7
Video Capture Data
JADE_IO_G1_0
DCLKIN1 
VIN0_4
Video Capture Data
JADE_VO0_21
Digital RGB output 0 Data B5
VIN0_3
Video Capture Data
Preliminary
Revision
Storage
PA 4.2
Mycable01
Function
23(45)

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