Fujitsu EVB JADE-­D Manual page 15

Prepared
Manfred Ortmann
Approved
Pin
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
Tab. 2­1: Pin assignment of connector X101, CPU signals side
Document Number
Checked Date
2009­10­05
Signal
DOUTR1_R_5 Digital RGB output1 with serial resistor
DOUTG1_R_6 Digital RGB output1 with serial resistor
DOUTR1_R_2 Digital RGB output1 with serial resistor
DOUTR1_R_3 Digital RGB output1 with serial resistor
DCLKO1_R Video output interface 1 dot clock output w. s. r.
DOUTR1_R_4 Digital RGB output1 with serial resistor
GV1 Video output interface 1 graphics / video switch
DOUTR1_R_7 Digital RGB output1 with serial resistor
VINHSYNC0 Video Capture 0 Horizontal Syncronisation
DOUTR1_R_6 Digital RGB output1 with serial resistor
VINVSYNC1 Video Capture 1 Vertical Syncronisation
VSYNC1 Video output interface 1 vertical sync output
vertical sync input in external sync mode
VINFID0 Video input 0 field identification signal
HSYNC1 Video output interface 1 horizontal sync output
Horizontal sync input in external sync mode
DE1 DE / CSYNC
GND Ground at center pin
GND Ground at center pin
GND Ground at center pin
GND Ground at center pin
GND Ground at center pin
GND Ground at center pin
GND Ground at center pin
GND Ground at center pin
Preliminary
Revision Storage
PA 4.2 Mycable01
Function
15(45)