MSI MS-6330 Technical Manual page 56

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AWARD BIOS Setup
OnChip Modem
Auto allows the mainboard to detect whether a modem is used. If a modem is
detected, the onboard modem controller will be enabled; if not, the controller
is disabled. Disable the controller if you want to use other controller cards
to connect modems. Settings: Auto and Disable.
CPU to PCI Write Buffer
When Enabled, CPU can write up to four words of data into the PCI write
buffer before the CPU must wait for PCI bus cycles to finish. When Disa-
bled, the CPU must wait after each write cycle until the PCI bus signals that
it is ready to receive more data.
PCI Dynamic Bursting
When Enabled, every write transaction goes to the write buffer. Then
burstable transactions burst on the PCI bus and nonburstable transactions
do not.
PCI Master 0 WS Write
When Enabled, writes to the PCI bus are executed with zero wait state.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delayed
transactions cycles so that transactions to and from the ISA bus are buff-
ered and PCI bus can perform other transactions while the ISA transaction is
underway. Select Enabled to support compliance with PCI specification
version 2.1. Settings: Enabled and Disabled.
PCI #2 Access #1 Retry
When Disabled, PCI#2 will not be disconnected until access finishes.
When Enabled, PCI#2 will be disconnected if max retries are attempted
without success.
AGP Master 1 WS Write
When Enabled, writes to the AGP bus are executed with one wait state
inserted.
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