Dram Timing Settings - JETWAY V600DA User Manual

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DRAM Timing Settings

CMOS Setup Utility – Copyright(C) 1984-2003 Award Software
Auto Configuration
x RAS Active Time
x RAS Precharge Time
x RAS to CAS Delay
CAS Latency
Bank Interleave
DRAM Command Rate
DRAM Queue Depth
↑↓→← Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values
RAS Active Time
This field let's you insert a timing delay between the CAS and RAS strobe signals, used
when DRAM is written to, read from, or refreshed. Fast gives faster performance; and Slow
gives more stable performance.
installed in the system. The settings are: 2T and 3T.
RAS Precharge Time
If an insufficient number of cycles is allowed for the RAS to accumulate its charge before
DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain date. Fast
gives faster performance; and Slow gives more stable performance. This field applies only
when synchronous DRAM is installed in the system. The settings are: 2T and 3T.
CAS Latency
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends
on the DRAM timing. The settings are: 2T and 2.5T.
DRAM Timing Settings
By SPD
7T
3T
3T
2.5T
4 Bank
2T Command
4 Level
F6:Optimized Defaults
This field applies only when synchronous DRAM is
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F7:Standard Defaults