Read Long (22H/23H); Table 108: Read Long (22H/23H) - Hitachi HTS542525K9SA00 Specifications

12.18 Read Long (22h/23h)

Table 109: Read Long (22h/23h)
Command Block Output Registers
Register
Data
Feature
Sector Count
Sector Number
Cylinder Low
Cylinder High
Device/Head
Command
Error Register
7 6 5
CRC UNC 0 IDN
0 0 0
The Read Long command reads the designated one sector of data and the ECC bytes from the disk media. It then
transfers the data and ECC bytes from the device to the host.
After 512 bytes of data have been transferred, the device will keep setting DRQ = 1 to indicate that the device is
ready to transfer the ECC bytes to the host. The data is transferred 16 bits at a time and the ECC bytes are trans-
ferred 8 bits at a time. The number of ECC bytes are 4 or 40 according to the setting of Set Feature option. The
default setting is 4 bytes of ECC data.
The command makes a single attempt to read the data and does not check the data using ECC. Whatever is read is
returned to the host.
Output parameters to the device
Sector Count
Sector Number
Cylinder High/Low This indicates the cylinder number of the sector to be transferred. (L = 0)
H
R
7 6 5 4 3 2 1 0
- - - - - - - -
- - - - - - - -
0 0 0 0 0 0 0 1
V V V V V V V V
V V V V V V V V
V V V V V V V V
1 L 1 D H H H H
0 0 1 0 0 0 1 R
4 3 2 1
0 ABT T0N AMN
V 0 V 0
This indicates the number of continuous sectors to be transferred. The Sector Count must
be set to one.
This indicates the sector number of the sector to be transferred. (L = 0)
In LBA mode, this register contains LBA bits 0–7. (L = 1)
In LBA mode, this register contains LBA bits 8–15 (Low), 16–23 (High). (L = 1)
This indicates the head number of the sector to be transferred. (L = 0)
In LBA mode, this register contains LBA bits 24–27. (L = 1)
This indicates the retry bit. This bit is ignored.
Deskstar 7K160 Hard Disk Drive Specification
Command Block Input Registers
Register
Data
Error
Sector Count
Sector Number
Cylinder Low
Cylinder High
Device/Head
Status
0 7 6 5
BSY RDY DF DSC DRQ
0 0 V 0
183
7 6 5 4 3 2 1 0
- - - - - - - -
see below
- - - - - - - V
V V V V V V V V
V V V V V V V V
V V V V V V V V
- - - - H H H H
see below
Status Register
4 3 2 1
COR IDX
V - 0 -
0
ERR
V