Set Transfer Mode; Write Cache; Advanced Power Management - Hitachi HTS542525K9SA00 Specifications

Note: After the power on reset or hard reset the device is set to the following features as default.

Write cache

ECC bytes
Read look-ahead
Reverting to power on defaults
Release interrupt

12.37.1 Set Transfer mode

When the Feature register is 03h (= Set Transfer mode) the Sector Count Register specifies the transfer mechanism.
The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value.
PIO Default Transfer Mode
PIO Default Transfer Mode, Disable IORDY
PIO Flow Control Transfer Mode x
Multiword DMA mode x
Ultra DMA mode x
12.37.2 Write Cache
If the number of auto reassigned sectors reaches the reassignment capacity of the device, the write cache function
will automatically be disabled. Although the device still accepts the Set Features command (with Feature register =
02h) without error, the write cache function will remain disabled. For the current write cache function status, refer
to (word 85 or 129) in Table 84: "Identify device information" on page 154.

12.37.3 Advanced Power Management

When the Feature Register is 05h (=Enable Advanced Power Management) the Sector Count Register specifies the
Advanced Power Management level.
FFH Aborted
The lowest Power Saving Mode is Normal Idle mode (the same as Dis-
C0-FEh
able Advanced Power Management)
80-BFh The lowest power consumption mode is Low Power Idle
01-7Fh The lowest power consumption mode is Low RPM standby mode
00H Aborted
The idle time to Low power idle mode and Low RPM standby mode vary according to the value in Sector Count
register as follows:
When Low power idle mode is the deepest Power Saving mode,
= (x − 80h) 5+ 120
y
1
=N/A
(the device does not go to Low RPM standby mode)
y
2
00000 000
00000 001
00001 nnn (nnn=000,001,010,011,100)
00100 nnn (nnn=000,001,010)
01000 nnn
(nnn=000,001,010,011,100,101)
(120 ☯y
☯435)
[sec]
1
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